Výsledky vyhledávání

Fabrication of Metal Gated FinFETs Through Complete Gate Silicidation With Ni

Autor: Ying Zhang, T. Kanarsky, J. Kedzierski, Hon-Sum Philip Wong, Meikei Ieong

Publikováno v: IEEE Transactions on Electron Devices. 51:2115-2120

Metal-gate FinFETs were fabricated using complete gate silicidation with Ni, combining the advantages of metal-gate and double-gate transistors. NiSi-gate workfunction control is demonstrated using silicide induced impurity segregation of As, P, and

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::009d6d67e8f441b032f977f52bcfb074
https://doi.org/10.1109/ted.2004.838448

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Strained Si CMOS (SS CMOS) technology: opportunities and challenges

Publikováno v: Solid-State Electronics. 47:1133-1139

Strain-induced enhancement of current drive is a promising way to extend the advancement of CMOS performance. Fabrication of strained Si MOSFET has been demonstrated with key elements of modern day’s CMOS technology. Significant mobility and curren

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::d27ced5d6d327ae962a6f6035aa37d11
https://doi.org/10.1016/s0038-1101(03)00041-8

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An experimental study on transport issues and electrostatics of ultrathin body SOI pMOSFETs

Autor: Suryanarayan G. Hegde, R.A. Roy, Hon-Sum Philip Wong, T. Kanarsky, Zhibin Ren, O. Dokumaci, P. Oldiges, M. Leong, Bruce B. Doris, E.C. Jones

Publikováno v: IEEE Electron Device Letters. 23:609-611

We present an experimental study of the transport properties (low field hole mobility /spl mu//sub h/) and electrostatics (threshold voltage V/sub th/, and gate-to-channel capacitance C/sub gc/) of ultrathin body (UTB) SOI pMOSFETs using a large Ring

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::2d3a233b257b87e21ccdec43cb7eb21e
https://doi.org/10.1109/led.2002.803757

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Examination of hole mobility in ultra-thin body SOI MOSFETs

Autor: O. Dokumaci, Hon-Sum P. Wong, Ronnen Andrew Roy, Wilfried Haensch, E.C. Jones, P. Oldiges, R. J. Miller, Bruce B. Doris, Paul M. Solomon, T. Kanarsky, Zhibin Ren, Meikei Ieong

Publikováno v: Digest. International Electron Devices Meeting.

This paper presents an experimental examination of hole mobility in ultra-thin body (UTB) SOI MOSFETs, covering wide ranges of T/sub SOI/ (between /spl sim/3.7 nm and /spl sim/50 nm), and temperature (between /spl sim/79 K and /spl sim/320 K). This p

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::48e9fa4381ae35347316d1525e1d7431
https://doi.org/10.1109/iedm.2002.1175777

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Extreme scaling with ultra-thin Si channel MOSFETs

Autor: R. J. Miller, Bruce B. Doris, Anda Mocuta, Michael A. Gribelyuk, Leathen Shi, Hon-Sum P. Wong, Ronnen Andrew Roy, Meikei Ieong, T. Kanarsky, Wesley C. Natzle, Hsiang-Jen Huang, Zhibin Ren, O. Dokumaci, Wilfried Haensch, J. Mezzapelle, E.C. Jones, Fen-Fen Jamin, Ying Zhang, S. Womack

Publikováno v: Digest. International Electron Devices Meeting.

We examine the scaling limits for planar single gate technology using the ultra-thin Si channel MOSFET. Characteristics for extreme scaled devices with physical gate lengths down to 6 nm and SOI channels as thin as 4 nm are presented. For the first t

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::95e57fa6d48687807b5f9ca080e6611c
https://doi.org/10.1109/iedm.2002.1175829

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Experimental evaluation of carrier transport and device design for planar symmetric/asymmetric double-gate/ground-plane CMOSFETs

Autor: R.J. Miller, Y. Taur, E.C. Jones, Toshiharu Furukawa, Zhibin Ren, O. Dokumaci, Meikei Ieong, T. Kanarsky, Hon-Sum P. Wong, Ronnen Andrew Roy, Leathen Shi

Publikováno v: International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

Demonstrated double-gate devices with excellent drive current and short-channel-effect control. The double-gate devices exhibit ideal linear, sub-threshold slope of 60 mV/dec and better than ideal saturated sub-threshold slope of 55 mV/dec. The effec

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::55b10ec6ca30530d305ab9bc71996b03
https://doi.org/10.1109/iedm.2001.979532

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Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation

Publikováno v: Scopus-Elsevier

Metal-gate FinFET and FDSOI devices were fabricated using total gate silicidation. Devices satisfy the following metal-gate technology requirements: ideal mobility, low gate leakage, high transconductance, competitive I/sub on//I/sub off/, and adjust

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::432012bf0eb9a4547ebec97e7de592ee
http://www.scopus.com/inward/record.url?eid=2-s2.0-0036923594&partnerID=MN8TOARS