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Autor:
G. Campardo, R. Micheloni, S. Commodaro, E. Yero, M. Zammabio, S. Mognoni, A. Sacco, M. Picca, A. Manstleita, M. Scotti, I. Motta, C. Golla, A. Pierin, A. Ohba, T. Fulatsuya, R. Makabe, S. Kawai, Y. Kai, S. Shimizu, T. Ohnakado, I. Sugihara, R. Bez, A. Grossi, A. Modelli, P.O. Khouri, G. Torelli
Publikováno v:
2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).
The ever increasing demand for denser flash memories leads to the multilevel (ML) storage approach, where any memory cell is programmed to one of m=2/sup n/ predetermined states and can hence store n bits. This 64 Mb 4-level cell (2b/cell) flash memo