Zobrazeno 1 - 10
of 34
pro vyhledávání: '"T. Chalvatzis"'
Publikováno v:
IEEE Journal of Solid-State Circuits. 42:1564-1573
This paper presents low-voltage circuit topologies for 40-Gb/s communications in 90-nm and 65-nm CMOS. A retiming flip-flop implemented in two different 90-nm CMOS technologies employs a MOS-CML Master-Slave latch topology with only two vertically st
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::32b360f7959bd5ad57423547632dc765
https://doi.org/10.1109/jssc.2007.899093
https://doi.org/10.1109/jssc.2007.899093
Autor:
K.H.K. Yau, P. Westergaard, T. Chalvatzis, E. Laskin, A. Mangan, R. Beerkens, Ming-Ta Yang, M. Tazlauanu, Sorin P. Voinigescu, Timothy O. Dickson
Publikováno v:
IEEE Journal of Solid-State Circuits. 41:1830-1845
This paper provides evidence that, as a result of constant-field scaling, the peak fT (approx. 0.3 mA/mum), peak fMAX (approx. 0.2 mA/mum), and optimum noise figure NFMIN (approx. 0.15 mA/mum) current densities of Si and SOI n-channel MOSFETs are lar
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5182f05560e076e08d0a9a62c558d4c3
https://doi.org/10.1109/jssc.2006.875301
https://doi.org/10.1109/jssc.2006.875301
Publikováno v:
2008 IEEE Compound Semiconductor Integrated Circuits Symposium.
This paper motivates the use of continuous-time delta-sigma data converters for bandwidths above 100 MHz. Lowpass and bandpass designs implemented in SiGe BiCMOS and clocked at 20-50 Gb/s are described in the context of radio applications. Next, the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4a81bad2f00421e58f018dd80cdaf994
https://doi.org/10.1109/csics.2008.44
https://doi.org/10.1109/csics.2008.44
Autor:
Timothy O. Dickson, Sorin P. Voinigescu, B. Sautreuil, C. Gamier, R.A. Aroca, T. Chalvatzis, Pascal Chevalier, S.T. Nicolson, P. Garcia
Publikováno v:
CICC
This paper describes first a half-rate, 2.5-V, 1.4-W, 87-Gb/s transmitter with on-chip PLL fabricated in a production 130-nm SiGe BiCMOS process. Next, the most critical blocks required for the implementation of a full-rate 100-Gb/s serial transceive
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aac31a2121b7283adb8f8c55a498e771
https://doi.org/10.1109/cicc.2007.4405776
https://doi.org/10.1109/cicc.2007.4405776
Publikováno v:
2007 IEEE Symposium on VLSI Circuits.
This paper presents a 2-GHz tunable direct sampling DeltaSigma receiver with 40-GHz sampling clock and on-chip PLL, fabricated in a production 130-nm SiGe BiCMOS process. The measured SFDR and SNDR are 59 dB and 59.84 dB, respectively, over a bandwid
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f7341d790a7aab093524da16a8d2de96
https://doi.org/10.1109/vlsic.2007.4342763
https://doi.org/10.1109/vlsic.2007.4342763
Autor:
S. Pruvost, C. Garnier, K.H.K. Yau, F. Pourchon, J. C. Vildeuil, Patrick Scheer, O. Noblanc, T. Chalvatzis, E. Laskin, Sorin P. Voinigescu, Frederic Gianesello, Alain Chantre, Daniel Gloria, Timothy O. Dickson, Patrice Garcia, S.T. Nicolson, Pascal Chevalier
Publikováno v:
2006 IEEE Compound Semiconductor Integrated Circuit Symposium.
This paper presents the status of most advanced CMOS and BiCMOS technologies able to address very high-speed optical communications and millimeter-wave applications. The performance of active and passive devices available on bulk Si and high-resistiv
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7464e89af62bb231a290ca529d7d037e
https://doi.org/10.1109/csics.2006.319906
https://doi.org/10.1109/csics.2006.319906
Autor:
S.T. Nicolson, M. Gordon, Sorin P. Voinigescu, Timothy O. Dickson, G. Ng, T. Yao, T. Chalvatzis, L. Tchoketch-Kebir, Shayan Shahramian, O. Yuryevich, A. Hazneci, P. Liu, Anthony Chan Carusone, B. Lai, A. Garg, K.H.K. Yau, E. Laskin
Publikováno v:
2006 Bipolar/BiCMOS Circuits and Technology Meeting.
This paper explores the application of SiGe BiCMOS technology to mm-wave transceiver with analog and digital signal processing. A review of 10 - 80Gb/s SERDES performance across 3 SiGe BiCMOS and CMOS technology nodes reveals remarkable similarities
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2493655264e0b32366dd16543ba2ba8c
https://doi.org/10.1109/bipol.2006.311161
https://doi.org/10.1109/bipol.2006.311161
Publikováno v:
2006 Proceedings of the 32nd European Solid-State Circuits Conference.
A low-power 40-Gb/s decision circuit for fiber-optic and mm-wave analog-to-digital converter applications was implemented in two 90-nm processes from two different foundries. The circuit uses a MOS-CML Master-Slave latch topology with only two vertic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a513cadbdf4bfc515635251af6f44750
https://doi.org/10.1109/esscir.2006.307502
https://doi.org/10.1109/esscir.2006.307502
Autor:
T. Chalvatzis, Sorin P. Voinigescu
Publikováno v:
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006.
A 2-GHz, continuous-time bandpass /spl Delta//spl Sigma/ analog-to-digital converter sampled with a 40-GHz clock was implemented in a 130-nm SiGe BiCMOS technology. It achieves an SNDR of 55 dB and 52 dB over 60 MHz and 120 MHz, respectively, and an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::70a753be25f52a62a3d05fc2703ba4cf
https://doi.org/10.1109/rfic.2006.1651147
https://doi.org/10.1109/rfic.2006.1651147
Autor:
A. Hazneci, I. Khalid, Timothy O. Dickson, T. Chalvatzis, E.S. Rogers, E. Laskin, R. Beerkens, Sorin P. Voinigescu
Publikováno v:
CICC
This paper presents an analysis of sub-2.5-V topologies and design methodologies for SiGe BiCMOS and sub-90nm CMOS building blocks to be used in the next generation of 40-100 Gb/s wireline transceivers. Examples of optimal designs for 40-80Gb/s broad
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fc98e17671e5edce65a5f0a9708b6290
https://doi.org/10.1109/cicc.2005.1568621
https://doi.org/10.1109/cicc.2005.1568621