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Autor:
Raghavasimhan Sreenivasan, H. He, James Chingwei Li, T. Levin, Shogo Mochizuki, Ali Khakifirooz, Bruce B. Doris, Darsen D. Lu, Dechao Guo, Pouya Hashemi, Huiming Bu, Benjamen N. Taber, Gen Tsutsui, Frederic Allibert, Bich-Yen Nguyen, S. M. Mignot, Theodorus E. Standaert, Tenko Yamashita, Winston Chern, Alexander Reznicek, C-Y Chen, T-S King Liu, K. Rim, Kangguo Cheng, E. C. Wall, Yunpeng Yin, Nuo Xu, Nicolas Loubet, Veeraraghavan S. Basker, Pierre Morin
Publikováno v:
2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).
Strain engineering has been in the heart of CMOS technology for over a decade. However, the effectiveness of conventional strain elements, such as stress liners, embedded S/D stressors, and stress memorization, is significantly reduced when device ga
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dbe14368339c453eae682dd98c01b3f2
https://doi.org/10.1109/s3s.2013.6716520
https://doi.org/10.1109/s3s.2013.6716520
