Zobrazeno 1 - 10
of 73
pro vyhledávání: '"T C, Chai"'
Autor:
S. Bhattacharya, T. G. Lim, D. Ho, K. J. Chui, X. W. Zhang, M. D. Rotaru, B. G. Sajay, T. C. Chai, S. C. Chong, H. Y. Li, S. Lim, X. Y. Wang, M. C. Jong, V. N. Sekhar, R. Dutta, Vempati S. Rao
Publikováno v:
2022 International Electron Devices Meeting (IEDM).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c4ab03660be3934f3942852eac1139ca
https://doi.org/10.1109/iedm45625.2022.10019429
https://doi.org/10.1109/iedm45625.2022.10019429
Autor:
Z. Di, A. Mani, A. T. Do, A. Baranikov, R. M. Veetil, R.P. Dominguez, A. I. Kuznetsov, K. T. C. Chai
Publikováno v:
2022 19th International SoC Design Conference (ISOCC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a4992406823a15fd3fe3c5e8ccb7a2b1
https://doi.org/10.1109/isocc56007.2022.10031456
https://doi.org/10.1109/isocc56007.2022.10031456
Publikováno v:
IEEE Sensors Journal. 21:13373-13383
This paper presents a novel Capacitance to Digital Converter (CDC) for ultra-low power microphone-based auscultation. The proposed CDC utilizes a continuous-time Capacitance to Voltage Converter (CVC) inside a delta-sigma ( $\Delta \Sigma $ ) modulat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3908f8a08ea5807735256c551463c24c
https://doi.org/10.1109/jsen.2021.3067804
https://doi.org/10.1109/jsen.2021.3067804
Autor:
Anh Tuan Do, Sumit Bam Shrestha, Ming Ming Wong, W. Jiang, K. T. C. Chai, Eng Kiat Koh, Yun Kwan Lee, V. P. Nambiar, A. Mani
Publikováno v:
ESSCIRC
This work introduces a neuromorphic chip featuring energy-efficient transfer learning capability using a new learning rule, Delta- Spike Time Dependent Plasticity (STDP). Delta STDP enables the neuromorphic chip to leverage on its previous knowledge
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0dd84bfa54a9f377b68388063e5da2b5
https://doi.org/10.1109/esscirc53450.2021.9567782
https://doi.org/10.1109/esscirc53450.2021.9567782
Autor:
M. M. Wong, S. B. Shrestha, V. P. Nambiar, A. Mani, Y. K. Lee, E. K. Koh, W. Jiang, K. T. C. Chai, A. T. Do
Publikováno v:
ESSDERC 2021 - IEEE 51st European Solid-State Device Research Conference (ESSDERC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cc3e98424f499d2aa3faa0e4d716e0df
https://doi.org/10.1109/essderc53440.2021.9631786
https://doi.org/10.1109/essderc53440.2021.9631786
Autor:
Kevin T. C. Chai, Edwin Nijhof, Jason Hock Huat Yeo, Jinghui Xu, Guoqiang Wu, Yuandong Gu, Wei Li, Beibei Han, Eva Wai
Publikováno v:
IEEE Transactions on Industrial Electronics. 66:6374-6382
In this paper, we present an experimental investigation of a water pipeline leak detection system based on a low-cost, tiny-sized hydrophone sensor fabricated using the microelectromechanical system (MEMS) technologies. A 10 × 10 element arrayed MEM
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6f6cd128e040fb544c7272367715a1f9
https://doi.org/10.1109/tie.2018.2874583
https://doi.org/10.1109/tie.2018.2874583
Publikováno v:
CICC
Recent hardware accelerators based on FPGA –[2] and ASIC –[4] have demonstrated high throughput and energy-efficient processing of path planning for applications, including the manipulation of arm-robots on a high-resolution map [1] and the auton
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a7949e04b12883cf8aee95bbdc144425
https://doi.org/10.1109/cicc51472.2021.9431448
https://doi.org/10.1109/cicc51472.2021.9431448
Autor:
Phua Ts, Serine Soh, Hsiang-Yao Hsiao, Eva Wai, Guan Kian Lau, T. C. Chai, Sharon Lim Ps, S. C. Chong, Boon Long Lau, Wen Wei Seit, Simon Siak Boon Lim, David Ho, Yong Liang Ye, Sharon Lim Sh, Keith Cheng Sing Lim
Publikováno v:
2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC).
With the slowing down of Moore's law, the semiconductor industry is increasingly looking to advanced packaging for achieving system scaling at packaging level. Across the industry, in high volume factories that support assembly and packaging of semic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3451feea83d51fd173b428696924219c
https://doi.org/10.1109/eptc50525.2020.9315155
https://doi.org/10.1109/eptc50525.2020.9315155
Publikováno v:
2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC).
A Finite Element Analysis (FEA) modelling on process dependent wafer warpage for Fan Out Wafer Level Packaging (FOWLP) technology is presented in this paper. Instead of using conventional Design-of-Experiment (DOE) approach, the numerical parametric
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5a791857b9465fc569cb1d294bd332f3
https://doi.org/10.1109/eptc50525.2020.9315147
https://doi.org/10.1109/eptc50525.2020.9315147
Autor:
Kevin T. C. Chai, Rahul Dutta, Kuang Kuo Lin, Surya Bhattacharya, Anh Tuan Do, Vishnu P. Nambiar, Jingjing Lan, Rheeshaalaen Sabapathy, Mihai Rotaru, Chai Tai Chong
Publikováno v:
2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC).
The complexity and cost of system-on-chip (SoC) designs keep increasing every year, which has progressively led to more opportunities for 2.5D System-in-Package (SiP) design. While 2.5D integration technology offers advantages for heterogeneous chipl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d0eaf75f2f42d7fb4f4ea41ba765f6f
https://doi.org/10.1109/eptc50525.2020.9315089
https://doi.org/10.1109/eptc50525.2020.9315089