Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Syotaro Ono"'
Autor:
Hiroaki Yamashita, Takenori Yasuzumi, Wataru Saito, Masataka Tsuji, Masaru Izumisawa, Syotaro Ono, Hisao Ichijo
Publikováno v:
2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD).
Novel superjunction (SJ)-MOSFET structure with distributed internal snubber area is proposed. RC network composed by gate electrode, oxide and P-type pillar provides frequency-dependent capacitive coupling between each terminal. The snubber area acts
Autor:
Wataru Saito, Masakazu Yamaguchi, Mizuki Ono, L. Zhang, Mitsuo Koike, Yohei Hayase, Shogo Itai, Syotaro Ono, Kazuya Matsuzawa, Keiryo Hara
Publikováno v:
Microelectronics Reliability. 55:1559-1563
Superjunction (SJ) MOSFETs with low on-resistance and high sustain voltage are widely used as main switching power devices. For the p / n -pillars of SJ-power devices, precise doping at low-doping region below 10 16 cm − 3 concentrations is require
Autor:
Shunsuke Katoh, Akihiro Oyama, Hideyuki Ura, Gentaro Ookura, Takayuki Yoshihira, Eiji Shimada, Syotaro Ono, Wataru Saito, Yusuke Kawaguchi
Publikováno v:
2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD).
Single-Event Burnout (SEB) is one of the catastrophic failure effects that could cause destruction of a MOSFET. In the present work, we experimentally obtained the dependence of SEB tolerance of Super-junction (SJ) MOSFET on temperature and studied t
Autor:
Wataru Saito, Yoshitaka Hokomoto, Hideyuki Ura, Masato Nashiki, Kenji Mii, Jun Onodera, Hiroaki Yamashita, Syotaro Ono
Publikováno v:
2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD).
We discuss switching behavior of superjunction (SJ)-MOSFETs in terms of interaction between MOS gate structure and charge imbalance (CIB) of SJ structure. Resistive load switching behavior of SJ-MOSFET was analyzed by device simulation. CIB changes t
Publikováno v:
2014 IEEE 26th International Symposium on Power Semiconductor Devices & IC's (ISPSD).
This paper reports device characteristics of superjunction (SJ) MOSFETs employed with platinum (Pt) doping or electron irradiation processes for high speed recovery operation of the internal body diode. For the inverter application, high speed recove
Autor:
Masakazu Yamaguchi, Wataru Saito, L. Zhang, Syotaro Ono, Hiroyuki Sugaya, Shingo Sato, Hiroshi Ohta, Miho Watanabe
Publikováno v:
2009 21st International Symposium on Power Semiconductor Devices & IC's.
600V-class superjunction (SJ)-MOSFETs were developed using our original high-resolution Scanning Spread Resistance Microscopy (SSRM) analysis technology [1] for optimization of trench filling process for the first time. The SSRM analysis is a powerfu
Autor:
Masakazu Yamaguchi, Kenichi Tokano, Syotaro Ono, Wataru Saito, Masataka Tsuji, Yasuto Sumi, Masaru Izumisawa, S. Kurushima
Publikováno v:
2008 20th International Symposium on Power Semiconductor Devices and IC's.
We investigated the profile dependency of specific on-resistance (RonA) under high- temperature and high-current-density conditions for 600 V-class semi-superjunction MOSFETs fabricated by the double-ion-implantation and multi-epitaxial method, for t
Publikováno v:
Proceedings of the 19th International Symposium on Power Semiconductor Devices and IC's.
We report the experimental results detailed about the n-buffer layer (n-BAL: n-bottom assist layer) of 600 V-class semi-SJ MOSFET, and discuss about the design optimization by comparing the trade-off characteristics between the specific on-resistance
Autor:
Syotaro Ono, Akio C O Patent Divis Nakagawa, Yusuke Kawaguchi, Akio Takano, Noboru Matsuda, M. Akiyama, Yoshihiro Yamaguchi
Publikováno v:
2006 IEEE International Symposium on Power Semiconductor Devices & IC's.
We proposed a new MOSBD, which integrates MOSFET and Schottky Barrier Diode (SBD) in a single chip. The features of the device are that the SBD are fabricated on fine mesa of less than 0.2μm, surrounded by trenches and optimally distributed inside t
Publikováno v:
Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005..
This paper analyzes the effects of parasitic inductances over the conversion efficiency of DC-DC converters by using Spice simulator. It was found that the self-turn-on of the low side MOSFET is triggered by large body diode reverse recovery current.