Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Sylvie Ortolland"'
Autor:
Didier Dutartre, Sylvie Ortolland, Michel Haond, Emmanuel Josse, Francois Andrieu, R. Nicolas, Alain Claverie, Thierry Poiroux, E. Baylac, R. Berthelon
Publikováno v:
Solid-State Electronics
Solid-State Electronics, 2017, 128, pp.72-79. ⟨10.1016/j.sse.2016.10.011⟩
Solid-State Electronics, Elsevier, 2017, 128, pp.72-79. ⟨10.1016/j.sse.2016.10.011⟩
Solid-State Electronics, 2017, 128, pp.72-79. ⟨10.1016/j.sse.2016.10.011⟩
Solid-State Electronics, Elsevier, 2017, 128, pp.72-79. ⟨10.1016/j.sse.2016.10.011⟩
The introduction of strained channel is mandatory to achieve high performance in Ultra-Thin-Body and Buried-Oxide Fully-Depleted-Silicon-On-Insulator (UTBB FDSOI) technology. Especially, compressive SiGe channel has been demonstrated to enhance hole
Autor:
X. Federspield, Mustapha Rafik, Florian Cacho, C. Ndiaye, M. Aiabi, C. Diouf, A. Biavaix, R. Berthelon, Sylvie Ortolland, Francois Andrieu, Vincent Huard
Publikováno v:
2017 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)
2017 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2017, Unknown, Unknown Region
2017 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2017, Unknown, Unknown Region
IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, APR 02-06, 2017; International audience; This work provides new results on the effects of the variation of Length of Diffusion (LOD), for active zones, the concentration of German
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2d0345a01ec084777a0a14401333f272
https://hal.science/hal-01694459
https://hal.science/hal-01694459
Publikováno v:
Solid-State Electronics
Solid-State Electronics, Elsevier, 2016, 125, pp.133-141. ⟨10.1016/j.sse.2016.07.013⟩
Solid-State Electronics, Elsevier, 2016, 125, pp.133-141. ⟨10.1016/j.sse.2016.07.013⟩
International audience; The development of high-voltage MOSFET (HVMOS) is necessary for including power management or radiofrequency functionalities in CMOS technology. In this paper, we investigate the fabrication and optimization of an Extended Dra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d3e5343eb389ec4fc532cff10ae48f5f
https://hal.archives-ouvertes.fr/hal-02003158
https://hal.archives-ouvertes.fr/hal-02003158
Autor:
Antoine Litty, Alexandres Dartigues, Dominique Golanski, Christian Dutto, Sorin Cristoloveanu, Sylvie Ortolland
Publikováno v:
International Journal of High Speed Electronics and Systems
International Journal of High Speed Electronics and Systems, World Scientific Publishing, 2016, 25 (1&2), pp.1640005. ⟨10.1142/S012915641640005X⟩
9th Workshop on Frontiers in Electronics 2015 (WOFE-15)
9th Workshop on Frontiers in Electronics 2015 (WOFE-15), Dec 2015, San Juan, Puerto Rico. ⟨10.1142/9789813220829_0005⟩
International Journal of High Speed Electronics and Systems, World Scientific Publishing, 2016, 25 (1&2), pp.1640005. ⟨10.1142/S012915641640005X⟩
9th Workshop on Frontiers in Electronics 2015 (WOFE-15)
9th Workshop on Frontiers in Electronics 2015 (WOFE-15), Dec 2015, San Juan, Puerto Rico. ⟨10.1142/9789813220829_0005⟩
High-Voltage MOSFETs are essential devices for complementing and extending the domains of application of any core technology including low-power, low-voltage CMOS. In this paper, we propose and describe advanced Extended-Drain MOSFETs, designed, proc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ffc81b29f5902f83a065633fc54b0b88
https://hal.archives-ouvertes.fr/hal-02008114
https://hal.archives-ouvertes.fr/hal-02008114
Publikováno v:
Solid-State Electronics
Solid-State Electronics, Elsevier, 2015, 113, pp.42-48. ⟨10.1016/j.sse.2015.05.011⟩
Solid-State Electronics, Elsevier, 2015, 113, pp.42-48. ⟨10.1016/j.sse.2015.05.011⟩
A promising high-voltage MOSFET (HVMOS) is experimentally demonstrated in 28 nm Ultra-Thin Body and Buried oxide Fully Depleted SOI technology (UTBB–FDSOI). The Dual Ground Plane Extended-Drain MOSFET (DGP EDMOS) architecture uses the back-gate bia
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6287d2534f068a6d4cc85e02f2e3b829
https://hal.archives-ouvertes.fr/hal-02003105
https://hal.archives-ouvertes.fr/hal-02003105
Publikováno v:
2015 ESSDERC Proceedings
2015 ESSDERC-45th European Solid-State Device Research Conference
2015 ESSDERC-45th European Solid-State Device Research Conference, Sep 2015, Graz, Austria. pp.134-137, ⟨10.1109/ESSDERC.2015.7324731⟩
ESSDERC
2015 ESSDERC-45th European Solid-State Device Research Conference
2015 ESSDERC-45th European Solid-State Device Research Conference, Sep 2015, Graz, Austria. pp.134-137, ⟨10.1109/ESSDERC.2015.7324731⟩
ESSDERC
session A7L-F: Innovation Approaches for Opto and Power Devices; International audience; We have already demonstrated the fabrication of a Dual-Ground Plane Extended Drain MOSFET with 28nm FDSOI technology. The detrimental consequences of ultrathin S
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3b29cc22a44edcf3ed9b9d25fed1c805
https://hal.archives-ouvertes.fr/hal-02004187
https://hal.archives-ouvertes.fr/hal-02004187
Publikováno v:
2015 ISPSD Proceedings
2015 27th IEEE International Symposium on Power Semiconductor Devices & IC's (ISPSD)
2015 27th IEEE International Symposium on Power Semiconductor Devices & IC's (ISPSD), May 2015, Hong Kong, China. pp.73-76, ⟨10.1109/ISPSD.2015.7123392⟩
2015 27th IEEE International Symposium on Power Semiconductor Devices & IC's (ISPSD)
2015 27th IEEE International Symposium on Power Semiconductor Devices & IC's (ISPSD), May 2015, Hong Kong, China. pp.73-76, ⟨10.1109/ISPSD.2015.7123392⟩
We investigate a promising high-voltage MOSFET (HVMOS) fabricated in the leading edge 14nm Fully-Depleted Silicon-On-Insulator technology (FDSOI). We focus on a variant of the Extended-Drain MOSFET (EDMOS) on SOI which features Ultra-Thin Body and Bu
Publikováno v:
2014 ESSDERC Proceedings
2014 ESSDERC-44th European Solid-State Device Research Conference
2014 ESSDERC-44th European Solid-State Device Research Conference, Sep 2014, Venice, Italy. pp.134-137, ⟨10.1109/ESSDERC.2014.6948776⟩
ESSDERC
2014 ESSDERC-44th European Solid-State Device Research Conference
2014 ESSDERC-44th European Solid-State Device Research Conference, Sep 2014, Venice, Italy. pp.134-137, ⟨10.1109/ESSDERC.2014.6948776⟩
ESSDERC
session A7L-G: Avanced Devices from Si to Wide-Bandgap; International audience; A promising high-voltage MOSFET (HVMOS) in Ultra-Thin Body and Buried oxide Fully Depleted SOI technology (UTBB-FDSOI) is experimentally demonstrated. The Dual Ground Pla
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6246008e6929f1431b39058aeff83490
https://hal.archives-ouvertes.fr/hal-02003875
https://hal.archives-ouvertes.fr/hal-02003875
Publikováno v:
2014 EUROSOI Proceedings
Solid-State Electronics
Solid-State Electronics, Elsevier, 2015, 112, pp.7-12. ⟨10.1016/j.sse.2015.02.013⟩
Solid-State Electronics
Solid-State Electronics, Elsevier, 2015, 112, pp.7-12. ⟨10.1016/j.sse.2015.02.013⟩
International audience; For the first time, the investigation and fabrication of a high-voltage MOSFET (HVMOS) in Ultra-Thin Body and Buried oxide Fully Depleted technology (UTBB-FDSOI) is reported. Through TCAD simulations, the lateral electric fiel
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9c55f786038bbf1b6acb4dbdba6a6253
https://hal.archives-ouvertes.fr/hal-02008239
https://hal.archives-ouvertes.fr/hal-02008239
Publikováno v:
Journal of Applied Physics
Journal of Applied Physics, American Institute of Physics, 1998, 84 (3), pp.1688-1692
Journal of Applied Physics, American Institute of Physics, 1998, 84 (3), pp.1688-1692
International audience; Bipolar n(+)pp(+) diodes fabricated by nitrogen implantation and passivated with a deposited oxide have been characterized. Current-voltage measurements in a large temperature range have been analyzed. We also used the optical