Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Sutae Kim"'
Autor:
Aliaa Kabeel, Sutae Kim, Young Gook Park, Donggyun Kim, Joe Kwan, Sarah Rizk, Kareem Madkour, Marwa Shafee, Jinhee Kim
Publikováno v:
DTCO and Computational Patterning II.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::46ccf129547c41e1009f9b7e6e59a88c
https://doi.org/10.1117/12.2658350
https://doi.org/10.1117/12.2658350
Publikováno v:
Journal of East Asian Landscape Studies. 12:71-81
This study on the intensive landscape management zone of Muju county in Korea was conducted for the purpose of first, developing landscape guidelines that take the current conditions of the landscape in the area and tourists’ requirements into acco
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::84a2e62b5ee6cdbe4e2e443ff3d20d8b
https://doi.org/10.51549/joral.2020.12.1.071
https://doi.org/10.51549/joral.2020.12.1.071
Publikováno v:
Current Applied Physics. 18:340-344
In this paper, we investigate the performance of ring oscillators composed of gate-all-around (GAA) silicon nanowire (NW) field-effect transistors (FETs) with four different numbers of NW channels, for sub-10-nm logic applications. Our simulations re
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f19e8d5d8bbe9e1daa4253af4cb5145c
https://doi.org/10.1016/j.cap.2017.12.012
https://doi.org/10.1016/j.cap.2017.12.012
Autor:
Sutae Kim
Publikováno v:
Journal of Language Sciences. 23:1-23
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aec717ccd06b9b610a8428032f68da5f
https://doi.org/10.14384/kals.2016.23.3.001
https://doi.org/10.14384/kals.2016.23.3.001
Publikováno v:
2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).
In this paper, we investigate the performance of inverters and ring oscillators composed of gate-all-around (GAA) silicon nanowire and nanosheet (NSH) field-effect transistors (FETs), compared with FinFETs, for sub-10nm logic technology applications.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e9bf720e046fded83da7cb39fdc91c20
https://doi.org/10.1109/vlsi-tsa.2018.8403835
https://doi.org/10.1109/vlsi-tsa.2018.8403835
Autor:
D. Chin, Chang Gyu Hwang, Huichul Shin, K. Kim, W.M. Park, Sangwoo Shim, C.S. Choi, J. H. Shin, Sutae Kim, Ohyun Kwon, Young-Kwan Park, Jung-Chak Ahn, S. W. Nam
Publikováno v:
1992 Symposium on VLSI Technology Digest of Technical Papers.
Micro villus patterning (MVP) technology which delivers the maximized cell capacitance is discussed. The key feature of the MVP technology is the formation of a hemispherical grain (HSG) archipelago and its transference to the underlayered oxide. The
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2720a455e2f019895a37331a36221440
https://doi.org/10.1109/vlsit.1992.200619
https://doi.org/10.1109/vlsit.1992.200619