Zobrazeno 1 - 10
of 39
pro vyhledávání: '"Surya Bhattacharya"'
Autor:
Vivek Chidambaram, Sharon Lim Pei Siang, Wang Xiangyu, Vasarla Nagendra Sekhar, Surya Bhattacharya
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 7, Pp 1209-1216 (2019)
Achieved system level heterogeneous integration involving 130 nm tech node active Si interposer, two 65 nm tech node I/O chips and one 28 nm tech node FPGA die. Chip on Chip on Substrate packaging methodology was demonstrated for handling active Si i
Externí odkaz:
https://doaj.org/article/8f74a72230314abdb958643a6f01cf44
Autor:
Teyuh Chou, Wei Tang, Mihai D. Rotaru, Chester Liu, Rahul Dutta, Sharon Lim Pei Siang, David Ho Soon Wee, Surya Bhattacharya, Zhengya Zhang
Publikováno v:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
Publikováno v:
2022 IEEE 72nd Electronic Components and Technology Conference (ECTC).
Autor:
Sajay Bhuvanendran Nair Gourikutty, Ming Chinq Jong, Chockanathan Vinoth Kanna, David Soon Wee Ho, Seit Wen Wei, Sharon Lim Pei Siang, Jiaqi Wu, Teck Guan Lim, Rathin Mandal, Jason Tsung-Yang Liow, Surya Bhattacharya
Publikováno v:
2022 IEEE 72nd Electronic Components and Technology Conference (ECTC).
Autor:
Sajay Bhuvanendran Nair Gourikutty, Ming Chinq Jong, Chockanathan Vinoth Kanna, David Soon Wee Ho, Jiaqi Wu, Rathin Mandal, Nanxi Li, Teck Guan Lim, Jason Tsung-Yang Liow, Surya Bhattacharya
Publikováno v:
2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC).
Autor:
Mamdouh El Haj Assad, Himadri Chattopadhyay, Sayan Surya Bhattacharya, Abdullah Abusorrah, Nidal H. Abu-Hamdeh, Mohammad Rahimi-Gorji, Fahad S. Al-Mubaddel, Abhijit Dutta
Publikováno v:
Case Studies in Thermal Engineering, Vol 26, Iss, Pp 100992-(2021)
This work presents a case study of thermodynamic performance of a condenser used in a 210 MW thermal power station at Mejia in West Bengal, India. The analysis involves an improvement of actual overall heat transfer coefficient by varying tube materi
Autor:
Kok Keng Chua, Sharon Lim Seow Huang, Surya Bhattacharya, Desmond Yeo, Sajay Bhuvanendran Nair Gourikutty, Jesse Alton
Publikováno v:
2021 IEEE 71st Electronic Components and Technology Conference (ECTC).
Advanced wafer-level packaging has been successfully used in state-of-the-art FPGA ICs, smart-phone application processors, and GPU units to provide power-performance-form factor boosts that are not obtainable by conventional packaging. In addition,
Autor:
Surya Bhattacharya, David Ho Soon Wee, Eva Wai Leong Ching, Lim Teck Guan, Jong Ming Ching, Loh Woon Leng
Publikováno v:
2021 IEEE 71st Electronic Components and Technology Conference (ECTC).
A FOWLP and a Si-Interposer integration platform for Electronic IC (EIC) and Photonic IC (PIC) are described here. These two platforms are capable to support high-speed integration and scalable design of the next generation Optical Engine. The integr
Autor:
Sharon Lim Pei Siang, Chong Ser Choong, Lim Teck Guan, Han Yong, Surya Bhattacharya, David Ho, Chai Tai Chong
Publikováno v:
2021 IEEE 71st Electronic Components and Technology Conference (ECTC).
High density heterogeneous integration of ASIC and HBM2 through the use of embedded fine pitch interconnect (EFI) in face-to-face configuration using RDL 1st fan-out wafer packaging platform is demonstrated. The EFI configuration, thermal design cons
Publikováno v:
2021 IEEE 71st Electronic Components and Technology Conference (ECTC).
Fan-Out Wafer-Level-Packaging (FOWLP) that directly molds the bare die inside the package with the antenna fabricating on the package stands out a very elegant and compact solution for 77GHz MIMO radar. This paper presents the Long Range Radar (LRR)