Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Surendra Guntur"'
Autor:
Surendra Guntur, Phillip Christie, Ghiath Al-Kadi, Anirban Lahiri, Clemens Wüst, Andrei Terechko, A. Kumar, Marc Duranton, Jan Hoogerbrugge, Axel Nackaerts
Publikováno v:
The Lens
Multicore architectures provide scalable performance with a lower hardware design effort than single core processors. Our article presents a design methodology and an embedded multicore architecture, focusing on reducing the software design complexit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::878194fa8c65e0c8ccacc7f1aaae7be4
https://doi.org/10.1145/2180887.2180890
https://doi.org/10.1145/2180887.2180890
Publikováno v:
FPL
This paper describes the system architecture, design methodology and subsequent FPGA mapping of a millimeter wave digital baseband for wireless communication in the 60GHz spectral band. The baseband is designed to be compliant with the 802.11ad Singl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4d1cf10295cc373ebd0358313813f68b
https://doi.org/10.1109/fpl.2013.6645573
https://doi.org/10.1109/fpl.2013.6645573
Autor:
Andrei Terechko, Marc Duranton, Onno Eerenberg, Ghiath Al-Kadi, Jan Hoogerbrugge, Surendra Guntur
Publikováno v:
2010 Digest of Technical Papers International Conference on Consumer Electronics (ICCE).
This paper presents a method to parallelize the meandering based 3D recursive search (3DRS) motion estimation algorithm used in scan-rate up-conversion. The proposed algorithm is scalable and can easily be mapped to multiple processing units such as
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1a345b2de0ee1fd825dd0a88c4662d1b
https://doi.org/10.1109/icce.2010.5418693
https://doi.org/10.1109/icce.2010.5418693
Publikováno v:
Processor and System-on-Chip Simulation ISBN: 9781441961747
Multicore architectures provide scalable performance with a hardware design effort lower than for a single core processor with similar performance. This chapter presents a design methodology and an embedded multicore architecture focusing on boosting
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d4a960dca036e211cf24ab52636cc055
https://doi.org/10.1007/978-1-4419-6175-4_16
https://doi.org/10.1007/978-1-4419-6175-4_16
Autor:
Surendra Guntur, Pierre Michaud
Publikováno v:
HAL
[Research Report] PI 1871, 2007, pp.31
[Research Report] PI 1871, 2007, pp.31
Small transistors and high clock frequency have resulted in high power density, which makes temperature a strong constraint in today's microprocessor design. For maximizing performance, the thermal design power must be set according to average, inste
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::6ec418cf049d47e502020d33345c1bcd
https://hal.inria.fr/inria-00192779
https://hal.inria.fr/inria-00192779
Publikováno v:
2013 23rd International Conference on Field programmable Logic & Applications; 2013, p1-4, 4p
Publikováno v:
2013 23rd International Conference on Field programmable Logic & Applications; 2013, pxx-xxix, 10p
Publikováno v:
ACM Transactions on Embedded Computing Systems; Jul2012, Vol. 11 Issue 2, p25-25, 6p
Autor:
Terechko, Andrei, Hoogerbrugge, Jan, Alkadi, Ghiath, Guntur, Surendra, Lahiri, Anirban, Duranton, Marc, Wust, Clemens, Christie, Phillip, Nackaerts, Axel, Kumar, Aatish
Publikováno v:
ACM Transactions on Embedded Computing Systems; Jun2012, Vol. 11 Issue S1, p1-32, 32p
Autor:
Rainer Leupers, Olivier Temam
Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization as well as functional and timing verification. Recent, innovative technologies such as