Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Sunghyun Jee"'
Publikováno v:
Journal of the Korea Society of Computer and Information. 19:73-85
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4c0c66d1a1d9dbbb3af61c6f51fce040
https://doi.org/10.9708/jksci.2014.19.3.073
https://doi.org/10.9708/jksci.2014.19.3.073
Autor:
Sunghyun Jee, Kannappan Palaniappan
Publikováno v:
SoC
This paper evaluates performance of the dynamically instruction scheduled VLIW (DISVLIW) processor architecture. The DISVLIW processor architecture is designed for dynamically scheduling VLIW instructions using dependency information. Features such a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b21e79ad2be0875e75421d4d8b1bc635
https://doi.org/10.1109/issoc.2003.1267703
https://doi.org/10.1109/issoc.2003.1267703
Autor:
Sunghyun Jee, Kannappan Palaniappan
Publikováno v:
Interaction between Compilers and Computer Architectures
The paper proposes balancing scheduling effort more evenly between the compiler and the processor, by introducing dynamically scheduled Very Long Instruction Word (VLIW) instructions. Dynamically Instruction Scheduled VLIW (DISVLIW) processor is aime
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f9682bd6bdca9c936db6577cf54d9bc9
https://doi.org/10.1109/intera.2002.995839
https://doi.org/10.1109/intera.2002.995839
Autor:
Sunghyun Jee, Palaniappan, K.
Publikováno v:
Proceedings 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748); 2003, p7-10, 4p
Autor:
Sunghyun Jee, Palaniappan, K.
Publikováno v:
Proceedings International Symposium on Parallel Architectures, Algorithms & Networks (I-SPAN 2002); 2002, p175-180, 6p
Autor:
Sunghyun Jee, Palaniappan, K.
Publikováno v:
Proceedings Sixth Annual Workshop on Interaction between Compilers & Computer Architectures; 2002, p15-23, 9p