Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Sung Gun Kang"'
Autor:
Nak-Jin Son, Yongmin Park, Hwa-Sung Rhee, Sung Gun Kang, Sung-il Cho, Kyung-Hwan Yeo, Eun-Cheol Lee, Yun-Ki Choi, Jong Shik Yoon, Heebum Hong, Jeong-Hoon Ahn, Dongwoo Kim, Il-Ryong Kim, Jungtae Kim, Jong Mil Youn, Jae-Hun Jeong
Publikováno v:
2018 IEEE Symposium on VLSI Technology.
8LPP logic platform technology supports mobile and high-performance and lower power application especially for mobile, artificial intelligence (AI), and cryptocurrency devices. 8LPP is employing the evolutionary generation of bulk FinFET FEOL and 44n
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::40b1037773b5c94d6df5444162cc2a3a
https://doi.org/10.1109/vlsit.2018.8510673
https://doi.org/10.1109/vlsit.2018.8510673
Autor:
Ping Liu, Sung-Gun Kang, Jackie Yang, S. C. Song, Xiao-Yong Wang, Yanxiang Liu, Jedon Kim, Yandong Gao, Lixin Ge, Suh Youseok, Sam Yang, Jie Deng, Sung-Won Kim, Xiangdong Chen, Peijie Feng, Ken Rim, John Jianhong Zhu, Ming Cai, Chul-Yong Park, Da Yang, Jun Yuan, Hao Wang, Jihong Choi, Esin Terzioglu, P. R. Chidi Chidambaram, Jerry Bao, Paul Ivan Penzes
Publikováno v:
2017 Symposium on VLSI Technology.
The industry's first 10nm low power high performance mobile SoC has been successfully ramped in production. Thanks to a thorough design-technology co-development, 10nm SoC is 16% faster, 37% smaller, and 30% lower power than its 14nm predecessor. The
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5fb3c14e2e395aa29531c80076ca0460
https://doi.org/10.23919/vlsit.2017.7998203
https://doi.org/10.23919/vlsit.2017.7998203
Autor:
Dong-Won Kim, JiYeon Ku, Y. S. Bang, Junha Lee, S. M. Lim, Bum-Suk Kim, J. H. Do, S. D. Kwon, Jung-Chak Ahn, Jeong-Hyuk Choi, Y. C. Kim, H.-J. Cho, Sang-il Jung, Sung-Gun Kang, Taejoong Song, S. W. Paek, Won-Cheol Jeong, J. H. Jung, S. W. Ahn, Y. S. Yoon, Jong Shik Yoon
Publikováno v:
2017 Symposium on VLSI Technology.
10nm 2nd generation BEOL technology is described with an optimized illumination system and multi-patterning lithography. While the optimized illumination system offered a possibility to pattern reduced metal pitches in the preferred orientation, diff
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::018cd547c8f07b2981b2a159d22ddf67
https://doi.org/10.23919/vlsit.2017.7998156
https://doi.org/10.23919/vlsit.2017.7998156
Autor:
sung-gun Kang, Inhyae Yi
Publikováno v:
Korean Journal of Health Psychology. 16:501-520
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0b1a279faf92a3e80f0e7a6647fbd3f8
https://doi.org/10.17315/kjhp.2011.16.3.005
https://doi.org/10.17315/kjhp.2011.16.3.005
Publikováno v:
Journal of JSEE. 54:50-54
The Accreditation Board for Engineering Education in Korea was founded in 1999 and the first engineering education programs were accredited in 2001. The purpose of accreditation was to attract outstanding students to engineering colleges as well as t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ffcd136fdc6b7cad86652afa415a4d8a
https://doi.org/10.4307/jsee.54.6_50
https://doi.org/10.4307/jsee.54.6_50
Publikováno v:
2012 SEMI Advanced Semiconductor Manufacturing Conference.
The space of STI is considered as critical parameter for filling the STI trench free of void. On the other hand, as thickness of liner is thinner, it is insufficient to trap mobile charge and to satisfy the adhesion. The impact of STI liner with mech
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d75ca9bafc6ffeaac3a45eb360ae7cf4
https://doi.org/10.1109/asmc.2012.6212900
https://doi.org/10.1109/asmc.2012.6212900
Autor:
Min-Chul Sun, Kwon Lee, Jeong-Hwan Yang, You-Seung Jin, Hyun-Woo Lee, Young-Wug Kim, Shigenobu Maeda, Jung-A Choi, Sun-Young Oh, Su-Gon Bae, Jae-Yoon Yoo, Sung-Gun Kang, Kwang-Pyuk Suh, Ja-hum Ku
Publikováno v:
Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..
Relationship between mechanical stress engineering and flicker noise are clarified for the first time using a 50nm level CMOS technology. It is found that enhanced mechanical stress degrades flicker noise characteristics. Trap states and dipoles gene
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b0de98c1922e9f4624e544ab2af31ec0
https://doi.org/10.1109/vlsit.2004.1345417
https://doi.org/10.1109/vlsit.2004.1345417
Autor:
Maeda, S., You-Seung Jin, Jung-A Choi, Sun-Young Oh, Hyun-Woo Lee, Jae-Yoon Yoo, Min-Chul Sun, Ja-Hum Ku, Kwon Lee, Su-Gon Bae, Sung-Gun Kang, Jeong-Hwan Yang, Young-Wug Kim, Kwang-Pyuk Suh
Publikováno v:
2004 Digest of Technical Papers. 2004 Symposium on VLSI Technology; 2004, p102-103, 2p