Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Sunao Torii"'
Autor:
Sunao Torii, Ken-Ichi Ishikawa, Tatsumi Aoyama, Yasuyuki Kimura, Atsushi Sato, Hideo Matsufuru, Tomohiro Suzuki
Publikováno v:
ICCS
Pezy-SC processor is a novel new architecture developed by Pezy Computing K. K. that has achieved large computational power with low electric power consumption. It works as an accelerator device similarly to GPGPUs. A programming environment that res
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::deeb7654aea0d449ba5252df52ad806f
https://doi.org/10.1016/j.procs.2016.05.457
https://doi.org/10.1016/j.procs.2016.05.457
Publikováno v:
CANDAR
Cost and energy efficient supercomputers have received attention not only for scientific computation but for big data processing. In the fields of social networks and biology, the relationship between data is often represented by large target graphs
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::93b28dfa3899566b1787ea3396514c1b
https://doi.org/10.1109/candar.2016.0075
https://doi.org/10.1109/candar.2016.0075
Publikováno v:
ACM Transactions on Embedded Computing Systems. 8:1-16
We propose a secure platform on a chip multiprocessor, FIDES, in order to enable next generation mobile terminals to execute downloaded native applications for Linux. Its most important feature is the higher security based on multigrained separation
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2d3b60f61259d71c409426f6e0a9ea88
https://doi.org/10.1145/1457246.1457247
https://doi.org/10.1145/1457246.1457247
Publikováno v:
IEEE Micro. 28:54-62
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d3cf0dd3beb73a8cafe56ae21f35e2f7
https://doi.org/10.1109/mm.2008.75
https://doi.org/10.1109/mm.2008.75
Autor:
Shorin Kyo, Shohei Nomoto, Sunao Torii, Shinichiro Okazaki, Yasuyuki Ninomiya, Yuki Kobayashi, Hanno Lieske
Publikováno v:
ICASSP
The SIMD (single instruction, multiple data) control style achieves a very cost effective processor element (PE) control mechanism. In this paper, two efficient data transfer operations for a SIMD PE array processor are proposed to address the ineffi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f022601726429e523e7160ac7e804a12
https://doi.org/10.1109/icassp.2012.6288206
https://doi.org/10.1109/icassp.2012.6288206
Publikováno v:
2007 IEEE Symposium on VLSI Circuits.
A periodically all-in-phase clock generator and a skew-tolerant bus wrapper have been developed for multi-core SOC platforms. The clock generator produces clock frequencies in 81-steps, and the bus wrapper makes possible deterministic data transfer a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::495e99347d160b3021a0face75725991
https://doi.org/10.1109/vlsic.2007.4342697
https://doi.org/10.1109/vlsic.2007.4342697
Autor:
Takefumi Hiraga, K. Murakami, Noriaki Suzuki, Masato Edahiro, Tatsuya Tokue, N. Kayama, S. Suzuki, H. Tomonaga, K. Shigemoto, Sunao Torii, Junji Sakai, Y. Tatebe, T. Kusano, E. Ohbuchi, Naoki Nishi
Publikováno v:
ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..
A triple-CPU mobile application processor is developed on an 8.95mm/spl times/8.95mm die in a 0.13/spl mu/m CMOS process. The IC integrates 3/spl times/ARM926 cores, a DSP several accelerators, as well as strong bus and memory interfaces. It consumes
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::32f851811bcbeb3b462ed996b4a63ca9
https://doi.org/10.1109/isscc.2005.1493906
https://doi.org/10.1109/isscc.2005.1493906
Conference
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