Zobrazeno 1 - 10
of 75
pro vyhledávání: '"Suhui, Lee"'
Autor:
Chanju Park, Munsu Choi, Suhui Lee, Hyunho Kim, Taeheon Lee, Mohammad Masum Billah, Byunglib Jung, Jin Jang
Publikováno v:
Nanomaterials, Vol 12, Iss 13, p 2127 (2022)
A piezoresistive sensor is an essential component of wearable electronics that can detect resistance changes when pressure is applied. In general, microstructures of sensing layers have been adopted as an effective approach to enhance piezoresistive
Externí odkaz:
https://doaj.org/article/9adc89081a1b428cbe0f8f025ddda42e
Autor:
Sadia Sayed Urmi, Mohammad Masum Billah, Sunaina Priyadarshi, Jinbaek Bae, Byunglib Jung, Suhui Lee, Keunwoo Kim, Jiyeong Shin, Sangun Choi, Junhyung Lim, Taewook Kang, Changhee Lee, Jin Jang
Publikováno v:
IEEE Electron Device Letters. 44:80-83
Publikováno v:
IEEE Electron Device Letters. 43:1890-1893
Autor:
Mohammad Masum Billah, Abu Bakar Siddik, Dongjin Kim, Suhui Lee, Young Jo Cho, Md Hasnat Rabbi, Jin Jang
Publikováno v:
SID Symposium Digest of Technical Papers. 53:893-896
Publikováno v:
SID Symposium Digest of Technical Papers. 53:16-19
Publikováno v:
Amorphous Oxide Semiconductors. :239-272
Autor:
Suhui Lee, Md. Masum Billah, Hyunho Kim, Sunaina Priyadarshi, Md. Hasnat Rabbi, Jin Jang, Sadia Sayed Urmi
Publikováno v:
IEEE Electron Device Letters. 43:56-59
We report the dual gate (DG) amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) thin-film transistor (TFT) with a top-gate (TG) drain offset (LTG(Off)) structure under dual-gate driving. The TFT shows an on/off current ratio of ~107, subthreshold swing of
Publikováno v:
AIP Advances, Vol 7, Iss 12, Pp 125110-125110-7 (2017)
We report two-step annealing, high temperature and sequent low temperature, for amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) to improve its stability and device performance. The annealing is carried out at 300 oC in N2 ambi
Externí odkaz:
https://doaj.org/article/b96f9ced39db48259d56dfb4d97aca56
A Novel Gate Driver Working Under Depletion Mode Oxide TFTs Using Low-Temperature Poly-Si Oxide TFTs
Publikováno v:
IEEE Electron Device Letters. 42:1619-1622
We report a novel gate driver integrated by low-temperature poly-Si oxide (LTPO) thin-film transistors (TFTs). The proposed gate driver consists of four p-type low-temperature polycrystalline silicon (LTPS) TFTs and two n-type amorphous indium galliu
Publikováno v:
IEEE Electron Device Letters. 42:1476-1479
We report high voltage amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) using a drain offset structure. The a-IGZO TFT with drain offset length ( $\text{L}_{ {\mathrm{off}}}$ ) = $2.5~ \boldsymbol {\mu }\text{m}$ exhibits a max