Zobrazeno 1 - 10
of 72
pro vyhledávání: '"Sudhanva Gurumurthi"'
Autor:
Taekyun Kim, Kyomin Sohn, Sudhanva Gurumurthi, Aaron Nygren, Hoeju Chung, Kijun Lee, Vilas Sridharan, Munseon Jang, Ryu Ye-Sin
Publikováno v:
IEEE Computer Architecture Letters. 20:158-161
HBM3 is the next-generation technology in the JEDEC High Bandwidth Memory™ die-stacked DRAM standard. HBM3 is expected to be widely used in future SoCs to accelerate data center and automotive workloads. Reliability, Availability, and Serviceabilit
Autor:
Sudhanva Gurumurthi
Publikováno v:
Proceedings of the 31st International Symposium on High-Performance Parallel and Distributed Computing.
Publikováno v:
2022 IEEE International Reliability Physics Symposium (IRPS).
Publikováno v:
MICRO
Although emerging Non-Volatile Memories (NVMs) are expected to be adopted in future memory and storage systems, their non-volatility brings complications in designing processors wherein security is an essential requirement. One of these complications
Publikováno v:
IEEE Computer Architecture Letters. 18:132-135
Die-stacked memories that integrate multiple DRAM dies into the processor package have reduced the interface bottleneck and improved efficiency, but demands for memory capacity and bandwidth remain unfulfilled. Additionally, the introduction of memor
Publikováno v:
IEEE Transactions on Parallel and Distributed Systems. 27:3397-3411
The wide adoption of graphics processing units (GPUs) as accelerators for general-purpose applications makes the end-to-end reliability implications of their use increasingly significant. Fault injection is a widely adopted method to evaluate the res
Autor:
Sergey Blagodurov, Ada Gavrilovska, Abhinav Vishnu, Thaleia Dimitra Doudali, Sudhanva Gurumurthi
Publikováno v:
HPDC
The increasing demand of big data analytics for more main memory capacity in datacenters and exascale computing environments is driving the integration of heterogeneous memory technologies. The new technologies exhibit vastly greater differences in a
Publikováno v:
MCHPC@SC
With rapid growth in data volumes and an increase in number of CPU/GPU cores per chip, the capacity and bandwidth of main memory can be scaled up to accommodate performance requirements of data-intensive applications. Recent 3D-stacked in-package mem
Autor:
Sudhanva Gurumurthi, Fritz Previlon, David Kaeli, Vilas Sridharan, Mark Wilkening, Steven Raasch
Publikováno v:
DFT
Reliability is a significant design constraint for supercomputers and large-scale data centers. Modeling the effects of faults on applications targeted to such systems allows system architects and software designers to provision resilience features,
Autor:
Bradford M. Beckmann, Nuwan Jayasena, Indrani Paul, Steven K. Reinhardt, Gregory Rodgers, Mike Ignatowski, William C. Brantley, Sudhanva Gurumurthi, Gabriel H. Loh, Michael J. Schulte
Publikováno v:
IEEE Micro. 35:26-36
This article provides an overview of AMD's vision for exascale computing, and in particular, how heterogeneity will play a central role in realizing this vision. Exascale computing requires high levels of performance capabilities while staying within