Zobrazeno 1 - 10 of 11 pro vyhledávání: '"Stilianos Siskos"'
1
An offset cancellation technique of complementary input pair buffers for continuous time applications
Autor: Stilianos Siskos, L. Mountrichas
Publikováno v: International Journal of Circuit Theory and Applications. 45:720-726
Summary This letter describes an offset cancellation technique for rail-to-rail complementary input pair operational amplifiers in unity gain loop configuration that overcomes the variable offset and minimizes distortion. The simulated buffer exhibit
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::96e61a1aca84512b9c40a779f568ce51
https://doi.org/10.1002/cta.2253
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2
Polycrystalline Silicon TFTs Threshold Voltage Compensated Bias Current Generator for Analog Circuit Design
Autor: Stilianos Siskos, Ilias Pappas, C.A. Dimitriadis
Publikováno v: Journal of Display Technology. 6:633-638
A new bias current generator (BCG) with threshold voltage compensation for analog circuit design implemented with low-temperature polycrystalline silicon thin-film transistors (LT poly-Si TFTs) is proposed. The proposed topology can be used in AMOLED
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::47a338175d589ae62882482ca61eb8da
https://doi.org/10.1109/jdt.2010.2075912
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3
Comparison of two analog buffers implemented with low‐temperature polysilicon thin‐film transistors for active matrix displays applications
Autor: Ilias Pappas, Stilianos Siskos, C.A. Dimitriadis, Gerard Ghibaudo
Publikováno v: physica status solidi c. 5:3854-3857
In this paper a comparison in the performance of two analog buffers for Active Matrix Displays (AMDs) applications is presented. The two buffers are implemented by using low-temperature polysilicon thin-film transistors (LT poly-Si TFTs) presenting h
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::a029f51a34192ac286b47c988007518d
https://doi.org/10.1002/pssc.200780142
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4
A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications
Autor: H. Pournara, G. Koutroumpezis, Nikolaos Vassiliadis, Konstantinos Tatas, V. Kalenteridis, Konstantinos Siozios, Stilianos Siskos, Antonios Thanailakis, Ilias Pappas, Spiridon Nikolaidis, Dimitrios Soudris
Publikováno v: IEICE Transactions on Information and Systems. :1369-1380
A complete system for the implementation of digital logic in a Field-Programmable Gate Array (FPGA) platform is introduced. The novel power-efficient FPGA architecture was designed and simulated in STM 0.18 μm CMOS technology. The detailed design an
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::fbe5c64c661d7bc87954ee7859243159
https://doi.org/10.1093/ietisy/e88-d.7.1369
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5
Analog implementation of erosion/dilation, median and order statistics filters
Autor: Ioannis Pitas, Spiridon Vlassis, Kostantinos Doris, Stilianos Siskos
Publikováno v: Pattern Recognition. 33:1023-1032
In this work an analog implementation of nonlinear filters based on a current-mode sorting/selection network is presented. Three nonlinear filters, an erosion/dilation, a median and an order statistics filter are implemented. The circuits are designe
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::3fd3cfaa5c72e5cd9a60dab1ab88dfb5
https://doi.org/10.1016/s0031-3203(99)00162-4
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6
A NOVEL, COMPENSATED, TUNABLE CURRENT CONVEYOR
Autor: Stilianos Siskos, C. A. Karybakas, Theodore Laopoulos
Publikováno v: Journal of Circuits, Systems and Computers. :397-401
A novel circuit configuration realizing an electronically tunable CCII which is based on OTAs, is presented. Simulation results confirm certain remarkable features of this circuit; linear operation for various input voltage values, linear tuning of c
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::a4c9323750787d3a39185de26ae7e3a9
https://doi.org/10.1142/s0218126692000258
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7
A new analogue driver using Poly-Si Thin-Film Transistors for Active Matrix Displays
Autor: Ilias Pappas, Lazaros Nalpantidis, Stilianos Siskos
Publikováno v: Pappas, I, Nalpantidis, L & Siskos, S 2005, A new analogue driver using Poly-Si Thin-Film Transistors for Active Matrix Displays . in XX Conference on Design of Circuits and Integrated Systems .
Aalborg University
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::bbb934db57c44a14eb93011fc6fa762e
https://vbn.aau.dk/da/publications/9a7b3d3b-40a4-4677-a601-9e0de943fd0e
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8
Subthreshold behaviour modelling of FGMOS transistors using the ACM and the BSIM3V3 models
Autor: Stilianos Siskos, Maria Drakaki, G. Fikos
Publikováno v: Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (IEEE Cat. No.04CH37521).
The modelling behaviour of FGMOS devices in the subthreshold region is investigated. Experimental and simulated ID-VGG, and gm/ID vs. log(ID) data for the standard CMOS 0.6 /spl mu/m process are compared. The BSIM3V3 and the advanced compact model, A
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::ce9c8b30773873d0272eadba6ba23f79
https://doi.org/10.1109/melcon.2004.1346770
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10
Analogue CMOS vector normalisation circuit
Autor: Stilianos Siskos, G. Fikos
Publikováno v: Electronics Letters. 35:2197
A novel CMOS analogue circuit is proposed, which can be used to perform vector normalisation with respect to a Euclidean measure, with a bias circuit for all inputs and only four transistors per input. It is very fast, with < 1% linearity error over
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::2f81c697edfe234823e869a08b909a7e
https://doi.org/10.1049/el:19991503
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