Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Stevo Bailey"'
Autor:
Jaehwa Kwak, Stevo Bailey, Nandish Mehta, John Wright, Pi-Feng Chiu, Daniel Dabbelt, Krste Asanovic, Borivoje Nikolic, Vighnesh Iyer, Colin Schmidt, Ben Keller
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28:2721-2725
This work demonstrates a dual-core RISC-V system-on-chip (SoC) with integrated fine-grain power management. The 28-nm fully depleted silicon-on-insulator (FD-SOI) SoC integrates switched-capacitor voltage converters and 4-Gb/s off-chip serial links.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e2b7c77d0fb8817145a3f6feb3c238b3
https://doi.org/10.1109/tvlsi.2020.3030243
https://doi.org/10.1109/tvlsi.2020.3030243
Autor:
Stevo Bailey, Kannan Ramchandran, Orhan Ocal, Jaeduk Han, Woorham Bae, Elad Alon, Zhongkai Wang, Angie Wang, Borivoje Nikolic, Paul Rigge
Publikováno v:
IEEE Journal of Solid-State Circuits. 54:1993-2008
A 1.89-GHz bandwidth, 175-kHz resolution spectral analysis system-on-chip (SoC), integrating a subsampling analog-to-digital converter (ADC) frontend with a digital reconstruction backend and implementing a 21 600-point sparse Fourier transform based
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a185073062fb5331d78ded38dbe2a0b6
https://doi.org/10.1109/jssc.2019.2913099
https://doi.org/10.1109/jssc.2019.2913099
Publikováno v:
ISSCC
Over 253 million people worldwide suffer from permanent visual impairments (e.g., glaucoma, diabetic retinopathy, retinitis pigmentosa and macular degeneration) that cannot be rectified using refractive correction or surgery. Such patients rely on ca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b17cae489e40c96784a668786721c024
https://doi.org/10.1109/isscc42613.2021.9365771
https://doi.org/10.1109/isscc42613.2021.9365771
Autor:
Po-Hung Chen, Hanh-Phuc Le, Brian Richards, Pi-Feng Chiu, Milovan Blagojević, Elad Alon, James Dunn, Nicholas Sutardja, Jaehwa Kwak, Ben Keller, Yunsup Lee, Palmer Dabbelt, Rimas Avizienis, Stevo Bailey, Andreia Cathelin, Alberto Puggelli, Andrei Vladimirescu, Brian Zimmer, Philippe Flatresse, Andrew Waterman, Colin Schmidt, Ruzica Jevtic, Martin Cochet, Krste Asanovic, Borivoje Nikolic
Publikováno v:
Integrated Circuits and Systems ISBN: 9783030394950
Improving the energy efficiency of processor systems-on-chip (SoCs) is key to improving their performance and utility. The FD-SOI silicon process enables integrated systems that can deliver dramatic improvements in energy efficiency through system in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::57d8006d43be18490af2e59525ebf897
https://doi.org/10.1007/978-3-030-39496-7_11
https://doi.org/10.1007/978-3-030-39496-7_11
Autor:
Krste Asanovic, Bora Nikolic, David A. Patterson, Yunsup Lee, Jaehwa Kwak, Andrew Waterman, Elad Alon, Ben Keller, Henry Cook, Ruzica Jevtic, Stevo Bailey, Alberto Puggelli, Brian Richards, Pi-Feng Chiu, Jonathan Bachrach, Brian Zimmer, Milovan Blagojevic, Rimas Avizienis
Publikováno v:
IEEE Micro. 36:8-20
The final phase of CMOS technology scaling provides continued increases in already vast transistor counts, but only minimal improvements in energy efficiency, thus requiring innovation in circuits and architectures. However, even huge teams are strug
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::66511acfa01e28eb38c8ca3bae16bd9f
https://doi.org/10.1109/mm.2016.11
https://doi.org/10.1109/mm.2016.11
Autor:
Jim McGrath, Richard Lin, Darin Heckendorn, Eric Chang, Jaeduk Han, Brian Richards, Franco DeSeta, Ronen Shoham, Justin Norsworthy, Elad Alon, Borivoje Nikolic, Steve Shauck, Zhongkai Wang, Mark A. Snowden, Dan Fuhrman, Munir Razzaque, Jonathan Bachrach, Chick Markley, Matthew Doerflein, Woorham Bae, Stevo Bailey, Howard Mao, Nathan Narevsky, Paul Rigge, Joseph Cole, Wen Hau Ma, Sergio Montano, Mike Stellfox, Angie Wang, Akalu Lentiro, Adam Izraelevitz
Publikováno v:
A-SSCC
This paper demonstrates a signal analysis SoC consisting of a general-purpose RISC-V core with vector extensions and a fixed-function signal-processing accelerator. Both the core and the accelerators are instances produced by novel generators that al
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9ef7c5c3d39448e42699514b21b61f0c
https://doi.org/10.1109/asscc.2018.8579326
https://doi.org/10.1109/asscc.2018.8579326
Autor:
Stevo Bailey, Angie Wang, Orhan Ocal, Woorham Bae, Elad Alon, Paul Rigge, Borivoje Nikolic, Zhongkai Wang, Kannan Ramchandran, Jaeduk Han
Publikováno v:
ESSCIRC
A 1.89-GHz bandwidth, 175-kHz resolution spectral analysis SoC, integrating a subsampling ADC frontend with a digital reconstruction backend and implementing a 21,600-point FFAST sparse FFT [1] has been generated using the Chisel [2] and BAG [3] fram
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fcab495b49d71ad34d3c32e9fd44a322
https://doi.org/10.1109/esscirc.2018.8494317
https://doi.org/10.1109/esscirc.2018.8494317
Autor:
Robert Jarnot, John Wright, Borivoje Nikolic, Stevo Bailey, Vladimir Milovanovic, Nandish Mehta, Dan Werthimer, Rachel Hochman
Publikováno v:
CICC
This work presents a Chisel ASIC spectrometer generator, which supports a wide array of applications through a modular and parameterized hierarchical design. Customizable features include filter coefficients, FFT bins, automatic pipelining, bitwidth
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::05a064e43cb7663e3aec9eee0ed27040
https://doi.org/10.1109/cicc.2018.8357062
https://doi.org/10.1109/cicc.2018.8357062
Autor:
Angie Wang, Palmer Dabbelt, Howard Mao, Stevo Bailey, Jaeduk Han, James Dunn, Eric Chang, Borivoje Nikolic, Elad Alon, Brian Richards
Publikováno v:
A-SSCC
Dedicated hardware accelerators enable energy-efficient implementations of radio and imaging basebands. Multistandard, multi-mode radio basebands require an on-the-fly reconfigurable fast Fourier transform (FFT) accelerator that implements many diffe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d81b1be679aa70ef0a82985b943435d5
https://doi.org/10.1109/asscc.2017.8240277
https://doi.org/10.1109/asscc.2017.8240277
Autor:
Martin Cochet, Krste Asanovic, Borivoje Nikolic, Pi-Feng Chiu, Ben Keller, Elad Alon, Jaehwa Kwak, Colin Schmidt, Palmer Dabbelt, Alberto Puggelli, Brian Zimmer, Milovan Blagojevic, Stevo Bailey, Yunsup Lee
Publikováno v:
ESSCIRC
This work presents a RISC-V system-on-chip (SoC) with integrated voltage regulation and power management implemented in 28nm FD-SOI. A fully integrated switched-capacitor DC-DC converter, coupled with an adaptive clocking system, achieves 82–89% sy
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8e148250c08bb9c87f994ca4528ba7ce
https://doi.org/10.1109/esscirc.2016.7598294
https://doi.org/10.1109/esscirc.2016.7598294