Zobrazeno 1 - 10
of 127
pro vyhledávání: '"Steven Demuynck"'
Autor:
Geert Mannaert, Hans Mertens, Maryam Hosseini, Steven Demuynck, Vy Thi Hoang Nguyen, B.T. Chan, Frédéric Lazzarino
Publikováno v:
Advanced Etch Technology and Process Integration for Nanopatterning XII.
Autor:
Naoto Horiguchi, Basoene Briggs, Boon Teik Chan, Steven Demuynck, Maryam Hosseini, Geert Mannaert, Hans Mertens, Yusuke Oniki, Sujith Subramanian, Zheng Tao
Publikováno v:
Advanced Etch Technology and Process Integration for Nanopatterning XI.
Autor:
Anshul Gupta, Zheng Tao, Dunja Radisic, Hans Mertens, Olalla Varela Pedreira, Steven Demuynck, Juergen Boemmels, Katia Devriendt, Nancy Heylen, Shouhua Wang, Karine Kenis, Lieve Teugels, Farid Sebaai, Christophe Lorant, Nicolas Jourdan, Boon Teik Chan, Sujith Subramanian, Filip Schleicher, Antony Peter, Nouredine Rassoul, Yong Kong Siew, Basoene Briggs, Dasiy Zhou, Erik Rosseel, Elena Capogreco, Geert Mannaert, Alfonso Sepúlveda Márquez, Emmanuel Dupuy, Kevin Vandersmissen, Bilal Chehab, Gayle Murdoch, Efrain Altamirano-Sánchez, Serge Biesemans, Zsolt Tokei, Eugenio Dentoni Litta, Naoto Horiguchi
Publikováno v:
Advanced Etch Technology and Process Integration for Nanopatterning XI.
Autor:
Stenfan Kubicek, Tom Schram, Joseph Ervin, Benjamin Vincent, Raghu Hathwar, Jerome Mitard, Eugenio Dentoni Litta, Sylvain Baudot, Mattan Kamon, Steven Demuynck, Thomas Chiarella, Yong Kong Siew, S. A. Chew
Publikováno v:
IEEE Transactions on Electron Devices. 67:5374-5380
A new methodology is demonstrated to assess the impact of fabrication inherent process variability on 14-nm fin field effect transistor (FinFET) device performance. A model of a FinFET device was built using virtual device fabrication and testing. Th
Autor:
S. Paolillo, Guillaume Boccardi, N. Jourdan, Manoj Jaysankar, Zheng Tao, Sylvain Baudot, Geert Mannaert, Juergen Boemmels, T. Hopf, E. Capogreco, Shouhua Wang, Efrain Altamirano, E. Dupuy, Olalla Varela Pedreira, B. Briggs, Thomas Chiarella, Joris Cousserier, Sofie Mertens, Romain Ritzenthaler, Frank Holsteyns, C. Lorant, Goutham Arutchelvan, Ingrid Demonie, Steven Demuynck, K. Kenis, Xiuju Zhou, Anshul Gupta, F. Sebai, D. Radisic, Zsolt Tokei, Erik Rosseel, A. Sepulveda, Naoto Horiguchi, Christel Drijbooms, Antony Premkumar Peter, Haroen Debruyn, Nouredine Rassoul, Bilal Chehab, P. Morin, Boon Teik Chan, Christopher J. Wilson, Katia Devriendt, Noemie Bontemps, Frederic Lazzarino, Paola Favia, Lieve Teugels, D. Yakimets, F. Schleicher, Houman Zahedmanesh, Jerome Mitard, Min-Soo Kim, An De Keersgieter, Sujith Subramanian, Kevin Vandersmissen, Hans Mertens, Eugenio Dentoni Litta, Yong Kong Siew
Publikováno v:
IEEE Transactions on Electron Devices. 67:5349-5354
Buried power rail (BPR) is a key scaling booster for CMOS extension beyond the 5-nm node. This work demonstrates, for the first time, the integration of tungsten (W) BPR lines with Si finFETs. BPR technology requires insertion of metal in the front-e
Autor:
Narendra Parihar, Goutham Arutchelvan, Jacopo Franco, Sylvain Baudot, Ann Opedebeeck, Steven Demuynck, Hiroaki Arimura, Lars-Ake Ragnarsson, Jerome Mitard, Vincent De Heyn, Abdelkarim Mercha
Publikováno v:
2021 IEEE International Integrated Reliability Workshop (IIRW).
Autor:
Maryamsadat Hosseini, Eugenio Dentoni Litta, M. H. van der Veen, Naoto Horiguchi, Zs. Tokei, A. Dangol, Davide Tierno, Steven Demuynck, K. Croes
Publikováno v:
2021 IEEE International Interconnect Technology Conference (IITC).
We evaluate the reliability of barrierless Mo metallization on various dielectrics that are used in both BEOL and MOL integration schemes. In particular, we assess the risk of metal drift-induced failure in SiO 2 , LK3.0, SiCO and Si 3 N 4 films by p
Autor:
Anshul Gupta, Yosuke Kimura, Thierry Conard, Dmitry Batuk, Briggs Basoene, Johan Meersschaut, Sylvain Baudot, Jef Geypen, Ebisudani Taishi, Gerardo Martinez, Timothee Blanquart, Praveen Dara, A. Peter, Steven Demuynck, Pierre Morin, Anabela Veloso, Elena Capogreco, Takayama Tomomi, Hans Mertens, Shiba Eiichiro, A. Sepúlveda, Sujith Subramanian
In this study, we explored the key properties and functionalities of plasma enhanced atomic layer deposition (PEALD) SiNx films, synthesized using different deposition temperatures (500–550 °C) and plasma conditions (lower and higher), both on 300
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::edd3fbab8933bc829a4ac31ead07a410
https://lirias.kuleuven.be/handle/123456789/676076
https://lirias.kuleuven.be/handle/123456789/676076
Autor:
P. Morin, Julien Ryckaert, Doyoung Jang, Lieve Teugels, Efrain Altamirano-Sanchez, M. H. Na, Jürgen Bömmels, F. Schleicher, S. Wang, A. Sepúlveda, Serge Biesemans, C. Lorant, I. Demonie, Gayle Murdoch, E. Dentoni Litta, A. Lesniewska, Zsolt Tokei, Bilal Chehab, Farid Sebaai, Antony Premkumar Peter, N. Nagesh, Naoto Horiguchi, Frederic Lazzarino, Boon Teik Chan, Geert Hellings, O. Varela Pedreira, N. Jourdan, D. Radisic, O. Richard, Z. Tao, Hans Mertens, P. Marien, Anshul Gupta, Nancy Heylen, Steven Demuynck, Katia Devriendt
Publikováno v:
2020 IEEE International Electron Devices Meeting (IEDM).
This paper reports BPR/Via-to-BPR (VBPR) module development at 24nm fin pitch (FP) / 42nm contacted gate pitch (CPP), and W and Ru-BPR and Ru- Contact-to-Active (M0A)/VBPR resistance (R) & electromigration (EM). BPR dielectric barrier, BPR plug barri
Autor:
N. Jourdan, Katia Devriendt, E. Dupuy, Hans Mertens, S. Paolillo, Guillaume Boccardi, F. Schleicher, E. Sanchez, Romain Ritzenthaler, Frank Holsteyns, Z. Tao, Sylvain Baudot, Sofie Mertens, Haroen Debruyn, Kevin Vandersmissen, Thomas Chiarella, P. Morin, Antony Premkumar Peter, Anshul Gupta, Erik Rosseel, Min-Soo Kim, Nouredine Rassoul, Boon Teik Chan, Christopher J. Wilson, D. Radisic, Lieve Teugels, A. De Keersgieter, D. Yakimets, I. Demonie, N. Bontemps, C. Drijbooms, Sujith Subramanian, Bilal Chehab, Paola Favia, C. Lorant, Farid Sebaai, Steven Demuynck, Frederic Lazzarino, E. Dentoni Litta, G. Mannaert, Houman Zahedmanesh, Yong Kong Siew, J. Cousserier, T. Hopf, B. Briggs, Manoj Jaysankar, Jerome Mitard, K. Kenis, A. Sepúlveda, S. Wang, Naoto Horiguchi, Goutham Arutchelvan, E. Capogreco, O. Varela Pedreira, D. Zhou, Jürgen Bömmels, Zsolt Tokei
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
Buried power rail (BPR) is a key scaling booster for CMOS extension beyond the 5 nm node. This paper demonstrates, for the first time, the integration of tungsten (W) BPR lines with Si finFETs. The characteristics of CMOS in close proximity to floati