Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Stephen Heinrich-Barna"'
Autor:
Keith Edmund Kunz, Edgar Sanchez-Sinencio, Kyoohyun Noh, Sanghoon Lee, Stephen Heinrich-Barna
Publikováno v:
IEEE Journal of Solid-State Circuits. 55:2498-2512
This article proposes an ultralow-power accurate current reference that generates 1-nA current. Since an automatic calibration circuit periodically calibrates the generated current of the current reference, the current reference is able to achieve ul
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2cb59b2aa69e72c7c3a2fd8c994d1c1b
https://doi.org/10.1109/jssc.2020.2995038
https://doi.org/10.1109/jssc.2020.2995038
Publikováno v:
ISCAS
The high speed of all-carbon spin logic (ACSL) is an ideal match for the non-volatility of resistive random-access memory (RRAM). Combining these two technologies in a computing system provides exceptionally high efficiency, with the possibility of r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::660005c3cf799b710141abe78c6d24ea
https://doi.org/10.1109/iscas.2018.8351857
https://doi.org/10.1109/iscas.2018.8351857
Autor:
Robert A. Glazewski, S. Poli, Bill Kraus, Scott L. Leisen, Stephen Heinrich-Barna, Kurt Stephen Schwartz
Publikováno v:
MWSCAS
Ferroelectric RAM (FRAM) is a non-volatile memory with fast, low power, high endurance, read and write operations. Hence, this technology remains an attractive choice for embedded system solutions. In this paper, we analyze Si data that initiated the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::35822bc409757cbb02c408315917c4c9
https://doi.org/10.1109/mwscas.2017.8052949
https://doi.org/10.1109/mwscas.2017.8052949
Publikováno v:
ISQED
Write-erase cycling of flash memories has distinct failure signatures that have been thoroughly documented in the literature. A new mechanism has been uncovered when cycling at low temperatures. On the 65nm embedded flash technology, units exhibited
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a23baa9fa4874a925e6818a4594f6e03
https://doi.org/10.1109/isqed.2017.7918298
https://doi.org/10.1109/isqed.2017.7918298
Autor:
Stephen Heinrich-Barna, Robert A. Glazewski, Saim Ahmad Qidwai, Scott L. Leisen, William Francis Kraus
Publikováno v:
2014 IEEE 6th International Memory Workshop (IMW).
Sense Amplifiers have always been an integral part of an embedded memory design and operation. The decreasing process size, appetite for speed, low power, and smaller area all contribute to increased Sense Amplifier (SA) offset. In FRAM technologies,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::538af98e65a7c33c7db04650d0e30e20
https://doi.org/10.1109/imw.2014.6849368
https://doi.org/10.1109/imw.2014.6849368
Autor:
Stephen Heinrich-Barna, Aswin N. Mehta
Publikováno v:
2014 IEEE 6th International Memory Workshop (IMW).
We present a simulation methodology to analyze single bit fails in SRAMs with no visual defect to account for the failure. Our approach generates the MOS IV curves for all six transistors of the failing bit cell and uses this data to simulate read, w
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::061cbf601b967033f1d4c2e323dfeee3
https://doi.org/10.1109/imw.2014.6849393
https://doi.org/10.1109/imw.2014.6849393
Publikováno v:
IEEE Journal of Solid-State Circuits; Sep2020, Vol. 55 Issue 9, p2498-2512, 15p
Publikováno v:
2015 6th Asia Symposium on Quality Electronic Design (ASQED); 2015, p1-5, 5p
Autor:
Mehta, Aswin, Heinrich-Barna, Stephen
Publikováno v:
2014 IEEE 6th International Memory Workshop (IMW); 2014, p1-4, 4p
Publikováno v:
2014 IEEE 6th International Memory Workshop (IMW); 2014, p1-5, 5p