Zobrazeno 1 - 10
of 27
pro vyhledávání: '"Stephen G. Tell"'
Autor:
Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, Charbel Sakr, William J. Dally, C. Thomas Gray, Brucek Khailany
Publikováno v:
IEEE Journal of Solid-State Circuits. 58:1129-1141
Publikováno v:
IEEE Journal of Solid-State Circuits. 57:2898-2908
Autor:
Yoshinori Nishi, John W. Poulton, Walker J. Turner, Xi Chen, Sanquan Song, Brian Zimmer, Stephen G. Tell, Nikola Nedovic, John M. Wilson, William J. Dally, C. Thomas Gray
Publikováno v:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
Autor:
Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, William J. Dally, C. Thomas Gray, Brucek Khailany
Publikováno v:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
Autor:
Joel Emer, Matthew Fojtik, C. Thomas Gray, Ben Keller, Stephen G. Tell, Priyanka Raina, Stephen W. Keckler, Alicia Klinefelter, William J. Dally, Brucek Khailany, Brian Zimmer, Jason Clemons, Rangharajan Venkatesan, Nan Jiang, Yanqing Zhang, Nathaniel Pinckney, Yakun Sophia Shao
Publikováno v:
IEEE Journal of Solid-State Circuits. 55:920-932
Custom accelerators improve the energy efficiency, area efficiency, and performance of deep neural network (DNN) inference. This article presents a scalable DNN accelerator consisting of 36 chips connected in a mesh network on a multi-chip-module (MC
Autor:
William J. Dally, C. Thomas Gray, John Wilson, Sudhir S. Kudva, John W. Poulton, Wenxu Zhao, Nikola Nedovic, Stephen G. Tell, Xi Chen, Walker J. Turner, Sunil Sudhakaran, Sanquan Song, Brian Zimmer
Publikováno v:
IEEE Journal of Solid-State Circuits. 54:43-54
This paper describes a short-reach serial link to connect chips mounted on the same package or on neighboring packages on a printed circuit board (PCB). The link employs an energy-efficient, single-ended ground-referenced signaling scheme. Implemente
Autor:
C. Thomas Gray, Brian Zimmer, Thomas Hastings Greer, John Wilson, Stephen G. Tell, Xi Chen, Sudhir S. Kudva, John W. Poulton, Sanquan Song, Nikola Nedovic, Walker J. Turner
Publikováno v:
ISSCC
A recent trend in high-performance systems is distribution of computing across many chips and packages to sustain performance scaling while achieving high yield and alleviating power delivery. High-end data center systems and new applications like de
Autor:
Stephen W. Keckler, Priyanka Raina, Joel Emer, Nan Jiang, Nathaniel Pinckney, Stephen G. Tell, Yakun Sophia Shao, Brian Zimmer, Brucek Khailany, Alicia Klinefelter, William J. Dally, Yanqing Zhang, Matthew Fojtik, Jason Clemons, C. Thomas Gray, Ben Keller, Rangharajan Venkatesan
Publikováno v:
MICRO
Package-level integration using multi-chip-modules (MCMs) is a promising approach for building large-scale systems. Compared to a large monolithic die, an MCM combines many smaller chiplets into a larger system, substantially reducing fabrication and
Autor:
Priyanka Raina, William J. Dally, C. Thomas Gray, Ben Keller, Joel Emer, Matthew Fojtik, Brian Zimmer, Yakun Sophia Shao, Alicia Klinefelter, Brucek Khailany, Yanqing Zhang, Nathaniel Pinckney, Jason Clemons, Nan Jiang, Rangharajan Venkatesan, Stephen G. Tell, Stephen W. Keckler
Publikováno v:
Hot Chips Symposium
Autor:
Brucek Khailany, Alicia Klinefelter, Joel Emer, Stephen W. Keckler, Priyanka Raina, Brian Zimmer, Rangharajan Venkatesan, Yanqing Zhang, Nathaniel Pinckney, Nan Jiang, Stephen G. Tell, Matthew Fojtik, William J. Dally, C. Thomas Gray, Ben Keller, Jason Clemons, Yakun Sophia Shao
Publikováno v:
VLSI Circuits
This work presents a scalable deep neural network (DNN) accelerator consisting of 36 chips connected in a mesh network on a multi-chip-module (MCM) using ground-referenced signaling (GRS). While previous accelerators fabricated on a single monolithic