Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Steffen Zeidler"'
Publikováno v:
LASCAS
The paper presents an alternative Single-Event Effect (SEE)-tolerant Triple Modular Redundancy (TMR) circuit topology for space applications. The proposed D-flip-flop circuit scheme is fully digitally designed and consists of local Single Event Trans
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::694246fa8ecdbd95157086eb91e4fb9e
https://doi.org/10.1109/lascas51355.2021.9459134
https://doi.org/10.1109/lascas51355.2021.9459134
Autor:
Marko Andjelkovic, Steffen Zeidler, Anselm Breitenreiter, Alexey Balashov, Oliver Schrape, Milos Krstic
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers
Use of a standard non-rad-hard digital cell library in the rad-hard design can be a cost-effective solution for space applications. In this paper we demonstrate how a standard non-rad-hard flip-flop, as one of the most vulnerable digital cells, can b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e52642628bb189ffdf54becaa533c7bf
Publikováno v:
DSD
Modern system-on-chips often integrate blocks, which need to be triggered by two or more clock sources depending on the circuit state. Glitchfree clock multiplexers are introduced to such systems for selecting the demanded clock. One specific problem
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c2d6a09817cd3b11d59ec5d4cb1317db
https://doi.org/10.1109/dsd51259.2020.00013
https://doi.org/10.1109/dsd51259.2020.00013
Publikováno v:
DSD
The paper presents and discusses the timing modeling approach for digital Radiation-Hardness by Design (RHBD) ΔTMR flip-flops. The basic fault-tolerant Triple Modular Redundancy (TMR) flip-flop architecture and the Single Event Transient-tolerant va
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fac6fd0d1c6316332bc68f9bbffdb676
https://doi.org/10.1109/dsd.2019.00100
https://doi.org/10.1109/dsd.2019.00100
Autor:
Anselm Breitenreiter, Oliver Schrape, Milos Krstic, Stefan Weidling, Pedro Reviriego, Steffen Zeidler
Publikováno v:
IOLTS
The protection of flip-flops against soft errors in digital circuits incurs significant overheads. To reduce the protection costs, it is common to identify the flip-flops in which errors can produce an effect on the system output or a persistent erro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2541cc41bc580a27dfaaa6bacda9f7b9
https://doi.org/10.1109/iolts.2019.8854380
https://doi.org/10.1109/iolts.2019.8854380
Autor:
Tobias Bjerregaard, Mikkel B. Stegmann, Isac G. Jensen, Oliver Schrape, Jannich Thorsen, Xin Fan, Steffen Zeidler, Milos Krstic
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 63:982-993
The simultaneous switching activity in digital circuits challenges the design of mixed-signal SoCs. Rather than focusing on time-domain noise voltage minimization, this work optimizes switching noise in the frequency domain. A two-tier solution based
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::551e88dd45279e5f6c4a0fbf4ccf50d2
https://doi.org/10.1109/tcsi.2016.2546118
https://doi.org/10.1109/tcsi.2016.2546118
Publikováno v:
ASYNC
This paper proposes a methodology for substrate noise reduction in mixed-signal integrated circuits (IC) by using a globally-asynchronous locally-synchronous (GALS) approach for digital system integration. For this purpose the harmonic balanced parti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d71a20b44a70381050ae1c1ac0bffe71
https://doi.org/10.1109/async.2016.15
https://doi.org/10.1109/async.2016.15
Publikováno v:
DDECS
Mitigating switching noise in highly complex integrated circuits (ICs) is one of the challenging issues in current design flows. The common way to optimize the noise characteristics is to apply current shaping techniques, which introduce clock skew t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6624aeb3f0e3490e6b129256330e1aaf
https://doi.org/10.1109/ddecs.2015.17
https://doi.org/10.1109/ddecs.2015.17
Publikováno v:
ICECS
The current evolution of mobile devices and networked pervasive computer systems, such as wireless sensor networks, demand more and more functionality while consuming a minimum amount of energy. Security is one important need within such networked sy
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ebac8ae7b28f7c3e233ffd6f54288832
https://doi.org/10.1109/icecs.2013.6815478
https://doi.org/10.1109/icecs.2013.6815478
Publikováno v:
Asian Test Symposium
Testing asynchronous circuits has been a challenge for several years. Especially, the nondeterministic timing behavior leads to problems during test, since the occurrence of test responses is not aligned to tester cycles. For this reason a test proce
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::661f957bd9aa5479a2ed6d6ce94496b9
https://doi.org/10.1109/ats.2012.40
https://doi.org/10.1109/ats.2012.40