Zobrazeno 1 - 10
of 23
pro vyhledávání: '"Stefano Aresu"'
Autor:
Holger Poehle, Roberta Stradiotto, Wolfgang Gustin, Marc Strasser, Stefano Aresu, Katja Puschkarsky
Publikováno v:
2018 International Integrated Reliability Workshop (IIRW).
For the reliability assessment of HV depletion NMOS devices, the relevant off-state degradation mechanisms are discussed and quantified on the example of a transistor in a 130 nm power technology. It can be shown that depending on its construction, t
Publikováno v:
Microelectronics Reliability. 54:1883-1886
Hot carrier (HC) injection, inducing drain and gate leakage current increase in 5 nm oxide p-channel LDMOS transistors, is investigated. Devices with two different drain implants are studied. At low gate voltage ( V GS ) and high drain voltage ( V DS
Autor:
Hans Reisinger, K. Kölpin, Stefano Aresu, Tibor Grasser, Christian Schlunder, Wolfgang Gustin, K. Rott
Publikováno v:
Microelectronics Reliability. 52:1891-1894
The physical origin of both Negative- and Positive Bias Temperature Instability (N-/PBTI) is still unclear and under debate. We analyzed the rarely studied recovery behavior after PBTI stress in pMOSFETs and compared it with NBTI data obtained from t
Autor:
Tibor Grasser, Christian Schlunder, Hans Reisinger, Stefano Aresu, Andreas Martin, P.-J. Wagner, T. Huttner, Wolfgang Gustin, R.-P. Vollertsen
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 9:106-114
Negative bias temperature instability (NBTI) degradation and recovery have been investigated for 7-50-nm non-nitrided oxides and compared to thin 1.8- and 2.2-nm nitrided oxides from a dual work function technology. A wide regime of stress fields fro
Publikováno v:
Microelectronics Reliability. 48:1490-1493
Experience shows that chip package interaction is a dominant cause for failures of electronic components. Optimising the technology by applying the standard temperature cycling test to detect these failures is very time consuming and not any more com
Publikováno v:
Microelectronics Reliability. 48:1509-1512
Bipolar transistors are part of the design manuals of almost all semiconductor wafer technologies. These design library devices must be qualified and released according to the present qualification standards, e.g. AEC (automotive electronic council)
Publikováno v:
Microelectronics Reliability. 47:1512-1516
ESD (electrostatic discharge) protection devices as part of the device pad circuitry of semiconductors are designed for a specific wafer technology and ESD withstanding voltage. After successful qualification they will be released for a usage in high
Autor:
Marc D'olieslaeger, G. Vanhoyland, Jean Manca, Stefano Aresu, Ann Swinnen, I. Haeldermans, Jan D'Haen, M. vande Ven
Publikováno v:
Advanced Functional Materials. 16:760-765
A new ordered structure of the C 60 derivative PCBM ([6-6]-phenyl C 61 -butyric acid methyl ester) is obtained in thin films based on the blend PCRM:regioregular P3HT (poly(3-hexylthiophene)). Rapid formation of needlelike crystalline PCBM structures
Publikováno v:
Microelectronic Engineering. 80:182-185
A model is proposed and validated for the degradation mechanisms occurring in ultra-thin SiO2 at real operation conditions, based on high-resolution, high-speed in-situ measurements. This state-of-the-art set-up proves that oxide degradation still oc
Autor:
Jean Manca, L. De Schepper, Stefano Aresu, Robin Degraeve, Jan D'Haen, Ben Kaczer, Gilbert Knuyt, W. De Ceuninck, Marc D'olieslaeger, J. Mertens
Publikováno v:
Microelectronics Reliability. 43:1483-1488
IMOMEC, IMEC Div, B-3590 Diepenbeek, Belgium. IMEC, B-3001 Heverlee, Belgium. Limburgs Univ Ctr, Inst Mat Res, B-3590 Diepenbeek, Belgium.Aresu, S, IMOMEC, IMEC Div, Wetenschapspk 1, B-3590 Diepenbeek, Belgium.