Prediction of Static Characteristic Parameters of an Insulated Gate Bipolar Transistor Using Artificial Neural Network

Autor: Qing Yao, Yufeng Guo, Bo Zhang, Jing Chen, Jun Zhang, Maolin Zhang, Xiaobo Guo, Jiafei Yao, Weihua Tang, Jianhua Liu

Publikováno v: Micromachines, Vol 13, Iss 1, p 4 (2021)

Breakdown voltage (BV), on-state voltage (Von), static latch-up voltage (Vlu), static latch-up current density (Jlu), and threshold voltage (Vth), etc., are critical static characteristic parameters of an IGBT for researchers. Von and Vth can charact

Externí odkaz: https://doaj.org/article/f4a36861c4cb4014a85c5eed3326ae57

Robust Soft Error Tolerant CMOS Latch Configurations

Autor: Anjan Kumar Pudi N S, Maryam Shojaei Baghini

Publikováno v: IEEE Transactions on Computers. 65:2820-2834

This paper presents a set of eight novel configurations for the design of single event soft error (SE) tolerant latches. Each latch uses a three-transistor building block called 1P-2N and its complementary block 2P-1N. It is shown that all proposed l

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4862d973c2731fe83eaf8766fcabe811
https://doi.org/10.1109/tc.2015.2509983

Reconfigurable Hardened Latch and Flip-Flop for FPGAs

Autor: Hamzeh Ahangari, Smail Niar, Ozcan Ozturk, Ihsen Alouani

Publikováno v: 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Jul 2017, Bochum, Germany. pp.433-438, ⟨10.1109/ISVLSI.2017.82⟩
Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, 2017
ISVLSI

Conference name: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2017 Date of Conference: 3-5 July 2017 In this paper, we propose Joint Latch (JLatch) and Joint Flip-Flop (JFF), two novel reconfigurable structures which bring the reconfigura

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4c1cad32e91c6bc13a12877273bef766
https://hal-uphf.archives-ouvertes.fr/hal-03388110

Latch susceptibility to transient faults and new hardening approach

Autor: Daniele Rossi, Martin Omana, Cecilia Metra

In this paper, we analyze the conditions making transient faults (TFs) affecting the nodes of conventional latch structures generate output soft errors (SEs). We investigate the susceptibility to TFs of all latch nodes and identify the most critical

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::362a5579b09fbd36e72b21da6a76cc08
http://hdl.handle.net/11568/1048782

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