Zobrazeno 1 - 10
of 277
pro vyhledávání: '"Stamatis Vassiliadis"'
Publikováno v:
Microelectronics Journal. 40:1103-1110
This paper presents the design, implementation and performance evaluation of a coarse-grain dynamically reconfigurable FPGA platform for multi-service edge and access network devices. The platform consists of two MicroBlaze RISC processors and a numb
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::31545d00577091b6b9e086692e82ec6e
https://doi.org/10.1016/j.mejo.2008.05.011
https://doi.org/10.1016/j.mejo.2008.05.011
Publikováno v:
IEEE Computer Graphics and Applications, July/August, 2008
Delft University of Technology
Delft University of Technology
The GRAphics AcceLerator (GRAAL) design-exploration framework is an open system that offers a coherent development methodology for hardware/software cosimulation and codesign of embedded 3D graphics accelerators. GRAAL incorporates tools to help visu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::187456a0a9543987d8777980018a25c3
https://doi.org/10.1109/mcg.2008.72
https://doi.org/10.1109/mcg.2008.72
Publikováno v:
International Journal of Electronics. 95:603-619
The instruction-set extensions problem has been one of the major topics in recent years and it consists of the addition of a set of new complex instructions to a given instruction-set. This problem in its general formulation requires an exhaustive se
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c8001baa6910c512f51be4219cc483c8
https://doi.org/10.1080/00207210801923620
https://doi.org/10.1080/00207210801923620
Publikováno v:
ACM Transactions on Architecture and Code Optimization
Extended subwords and the matrix register file (MRF) are two micro architectural techniques that address some of the limitations of existing SIMD architectures. Extended subwords are wider than the data stored in memory. Specifically, for every byte
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7a925edf8d3fbcd3917625b8ff3f2a28
https://doi.org/10.1145/1369396.1369401
https://doi.org/10.1145/1369396.1369401
Publikováno v:
IEEE Transactions on very large integration (VLSI) systems, 16 (2), 2008
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Summarization: In this paper, we consider hardware-based scanning and analyzing packets payload in order to detect hazardous contents. We present two pattern matching techniques to compare incoming packets against intrusion detection search patterns.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::47c379cc2daa7387c146595c70e3ba33
https://doi.org/10.1109/tvlsi.2007.912036
https://doi.org/10.1109/tvlsi.2007.912036
Publikováno v:
IEEE Transactions on Multimedia
IEEE Transactions on Multimedia, (10) 1, 2008
IEEE Transactions on Multimedia, (10) 1, 2008
The 2-D Discrete Wavelet Transform (DWT) consumes up to 68% of the JPEG2000 encoding time. In this paper, we develop efficient implementations of this important kernel on general-purpose processors (GPPs), in particular the Pentium 4 (P4). Efficient
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::402149f73d9bfa4ea420f8a0cf21d339
https://doi.org/10.1109/tmm.2007.911195
https://doi.org/10.1109/tmm.2007.911195
Autor:
Stamatis Vassiliadis, Ioannis Sourdis
Publikováno v:
Journal of Systems Architecture. 53:777-793
In this paper, we introduce the FLUX interconnection networks, a scheme where the interconnections of a parallel system are established on demand before or during program execution. We present a programming paradigm which can be utilized to make the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e493d897bd715bf8a9ffe88b82d71ca7
https://doi.org/10.1016/j.sysarc.2007.01.006
https://doi.org/10.1016/j.sysarc.2007.01.006
Publikováno v:
Computer Networks. 50:2271-2285
As buffer-less crossbar scheduling algorithms reach their practical limitations due to higher port numbers and data rates, internally buffered crossbar (IBC) switches have gained a lot of interest recently due to their great potential in solving the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::978ad522e2aa1a7b7f75f612ff3fce3f
https://doi.org/10.1016/j.comnet.2005.09.001
https://doi.org/10.1016/j.comnet.2005.09.001
Autor:
John Glossner, Sanjay Jinturkar, Michael J. Schulte, Suman Mamidi, Stamatis Vassiliadis, Mayan Moudgill
Publikováno v:
Journal of VLSI signal processing systems for signal, image and video technology. 43:143-159
Embedded digital signal processors for software defined radio have stringent design constraints including high computational bandwidth, low power consumption, and low interrupt latency. Furthermore, due to rapidly evolving communication standards wit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f7f8647131c73e8e4d68158aa48d49ce
https://doi.org/10.1007/s11265-006-7267-1
https://doi.org/10.1007/s11265-006-7267-1
Publikováno v:
Journal of VLSI signal processing systems for signal, image and video technology. 43:161-172
In this paper, we study the performance impact of dynamic hardware reconfigurations for current reconfigurable technology. As a testbed, we target the Xilinx Virtex II Pro, the Molen experimental platform and the MPEG2 encoder as the application. Our
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d475f0c596b700c8767d3e7204d0e9ec
https://doi.org/10.1007/s11265-006-7268-0
https://doi.org/10.1007/s11265-006-7268-0