Zobrazeno 1 - 10
of 23
pro vyhledávání: '"Srivatsava Jandhyala"'
Autor:
Devesh Khilwani, Vineet Moghe, Sandip Lashkare, Vivek Saraswat, Pankaj Kumbhare, Maryam Shojaei Baghini, Srivatsava Jandhyala, Sreenivas Subramoney, Udayan Ganguly
Publikováno v:
APL Materials, Vol 7, Iss 9, Pp 091112-091112-11 (2019)
The neural network enables efficient solutions for Nondeterministic Polynomial-time (NP) hard problems, which are challenging for conventional von Neumann computing. The hardware implementation, i.e., neuromorphic computing, aspires to enhance this e
Externí odkaz:
https://doaj.org/article/1342aeccfbd94712b35e70751c40d73a
Autor:
Navid Paydavosi, Sriramkumar Venugopalan, Yogesh Singh Chauhan, Juan Pablo Duarte, Srivatsava Jandhyala, Ali M. Niknejad, Chenming Calvin Hu
Publikováno v:
IEEE Access, Vol 1, Pp 201-215 (2013)
Two turn-key surface potential-based compact models are developed to simulate multigate transistors for integrated circuit (IC) designs. The BSIM-CMG (common-multigate) model is developed to simulate double-, triple-, and all-around-gate FinFETs and
Externí odkaz:
https://doaj.org/article/3781c2c387c8420b8041b079e0b66c5c
Autor:
Ashwin Lele, Srivatsava Jandhyala, Saurabh Gangurde, Virendra Singh, Sreenivas Subramoney, Udayan Ganguly
Publikováno v:
Communications in Computer and Information Science ISBN: 9783031215131
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5be9526a893822890a85c81380db5759
https://doi.org/10.1007/978-3-031-21514-8_41
https://doi.org/10.1007/978-3-031-21514-8_41
Publikováno v:
VDAT
We propose an all-CMOS, supply independent, second-order temperature compensated, process invariant, 10.09 μA current reference circuit working on a 1.8 V power supply. The current reference is built using an adaptive regulated cascode configuration
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b63d1fe4fb0d3ca81d4acc73ce9c1475
https://doi.org/10.1109/vdat53777.2021.9601082
https://doi.org/10.1109/vdat53777.2021.9601082
Autor:
Sreenivas Subramoney, Hong Wang, Belliappa Kuttanna, Eagle Jones, Jim Radford, Gopi Neela, Biji George, Srivatsava Jandhyala, Omer Om J, Dipan Kumar Mandal, Kalsi Gurpreet S, Santhosh Kumar Rethinagiri, Lance Hacking
Publikováno v:
DATE
Visual Inertial Odometry (VIO) is used for estimating pose and trajectory of a system and is a foundational requirement in many emerging applications like AR/VR, autonomous navigation in cars, drones and robots. In this paper, we analyze key compute
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b2e7c25b90e3e4cdb5645df8742f798
https://doi.org/10.23919/date.2019.8714921
https://doi.org/10.23919/date.2019.8714921
Publikováno v:
IEEE Transactions on Electron Devices. 63:940-945
Symmetric double-gate ferroelectric FETs (SDG-FeFETs) have better short-channel electrical behavior and hold promise in reducing the subthreshold swing below the classical Boltzmann’s limit. Surface potential and drain current models for SDG-FeFETs
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dda326e85c8d5889ba948a8be3ac8794
https://doi.org/10.1109/ted.2016.2519761
https://doi.org/10.1109/ted.2016.2519761
Autor:
Maryam Shojaei Baghini, Devesh Khilwani, P. Kumbhare, Sreenivas Subramoney, Vineet Moghe, Udayan Ganguly, Vivek Saraswat, Srivatsava Jandhyala, Sandip Lashkare
Publikováno v:
APL Materials, Vol 7, Iss 9, Pp 091112-091112-11 (2019)
The neural network enables efficient solutions for Nondeterministic Polynomial-time (NP) hard problems, which are challenging for conventional von Neumann computing. The hardware implementation, i.e., neuromorphic computing, aspires to enhance this e
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f4814057a51d95e5edd090eeb9ed8dfb
https://doaj.org/article/1342aeccfbd94712b35e70751c40d73a
https://doaj.org/article/1342aeccfbd94712b35e70751c40d73a
Autor:
Srivatsava Jandhyala, Yogesh Singh Chauhan, Ali M. Niknejad, Navid Paydavosi, Chenming Calvin Hu, Sriramkumar Venugopalan, Juan Pablo Duarte
Publikováno v:
IEEE Access. 1:201-215
Two turn-key surface potential-based compact models are developed to simulate multigate transistors for integrated circuit (IC) designs. The BSIM-CMG (common-multigate) model is developed to simulate double-, triple-, and all-around-gate FinFETs and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3fd858a86ef4caf60dda2527a03a16db
https://doi.org/10.1109/access.2013.2260816
https://doi.org/10.1109/access.2013.2260816
Autor:
Srivatsava Jandhyala, Soumya Tapse
Publikováno v:
2016 IEEE Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER).
In this manuscript, we propose a robust on-chip clock generator circuit using a power efficient phase frequency detector and a low current mismatch dual adaptive regulated cascode charge pump in 180nm UMC MPW RF process. The proposed PFD uses only 20
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2dcc3ed5b10c312004857de697bc00c2
https://doi.org/10.1109/discover.2016.7806235
https://doi.org/10.1109/discover.2016.7806235
Publikováno v:
2016 IEEE Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER).
Existing compact models for double gate FinFETs assume uniform gate-oxide thickness on both the functional sides of the Fins. Any difference in oxide thickness between the sides is accommodated by fit parameters in the compact model. Though such appr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dcf70b76c5458d1cab1ed356c0251282
https://doi.org/10.1109/discover.2016.7806234
https://doi.org/10.1109/discover.2016.7806234