Zobrazeno 1 - 2
of 2
pro vyhledávání: '"SriHarsh Pakala"'
Publikováno v:
Electronics Letters, Vol 58, Iss 25, Pp 943-945 (2022)
Abstract A novel frequency‐to‐voltage converter based phase‐locked loop (PLL) is proposed to overcome the inability of a frequency‐to‐voltage converter based frequency‐locked loop to lock phase. The proposed dual‐loop PLL adds variable
Externí odkaz:
https://doaj.org/article/ec57f8523f5343f99e3780c6d720667c
A novel frequency-to-voltage converter (FVC) based phase-locked loop (PLL) is proposed to overcome the inability of an FVC-based frequency-locked loop (FLL) to lock phase. The proposed dual-loop PLL adds variable phase-locking capability, such that t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::76a195e6a3ee5a758d99b7d0716b210c
https://doi.org/10.22541/au.166311542.26418727/v1
https://doi.org/10.22541/au.166311542.26418727/v1
