Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Sri Harsh Pakala"'
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 66:382-386
Current-mode ripple-based dc–dc converters have become a widely adopted topology due to their inherent advantages of improved dynamic transient response along with a simple current sensing scheme. However, the switching frequency of such converters
Publikováno v:
MWSCAS
A hybrid voltage-mode hysteretic boost converter is introduced in this work. The implemented control topology is practically self-stabilized due to the introduction of a current-limiting loop. A full range inductor current sensor and a hysteretic com
Publikováno v:
MWSCAS
This work presents the design of a high-bandwidth and high slew rate class-AB amplifier in a linear assisted hybrid converter for envelope tracking (ET) applications. ET has become prevalent for improving the efficiency of RF power amplifiers (PA) in
Publikováno v:
MWSCAS
This paper introduces a multi-loop fast transient response flipped voltage follower (FVF) low-dropout (LDO) voltage regulator suitable for system-on-chip (SOC) applications. While typical FVF-based LDOs exhibit fast transient response, which is criti
Publikováno v:
MWSCAS
In Miller and current buffer compensation techniques, the compensation capacitor often loads the output node. If a voltage buffer is used in feedback, the compensation capacitor obviates the loading on the output node. In this paper, we introduce an
Publikováno v:
MWSCAS
A new technique to decrease the transient recovery time in a very low-quiescent current low-dropout (LDO) voltage regulator is introduced. The new Transient Recovery Time Enhancement (TRTE) block comprises a voltage-to-current converter, current comp
Publikováno v:
MWSCAS
We report on a scheme to eliminate false codes generated due to switching delays among the output bits of an asynchronous parallel successive approximation analog-to-digital converter (SA-ADC) developed by Lin and Liu [1]. False output codes are elim
Publikováno v:
CICC
A new compensation technique known as tail compensation is applied to a two-stage CMOS operational amplifier. The compensation is established by a capacitor connected between the output node and the source node of the differential amplifier. For the