Zobrazeno 1 - 10
of 224
pro vyhledávání: '"Souvik, Mahapatra"'
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 8, Pp 1281-1288 (2020)
The physics-based BTI Analysis Tool (BAT) is used to model the time kinetics of threshold voltage shift (ΔVT) during and after NBTI in p-channel planar bulk and FDSOI MOSFETs and SOI FinFETs. BAT uses uncorrelated contributions from the trap generat
Externí odkaz:
https://doaj.org/article/309e7036b1174d82a2c68859e89cd321
Autor:
Uma Sharma, Souvik Mahapatra
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 8, Pp 1354-1362 (2020)
A SPICE compatible compact modeling framework is discussed for Hot Carrier Degradation (HCD) stress spanning the entire drain (VD) and gate (VG) voltage space and wide range of temperature (T). It can model the HCD time kinetics measured using differ
Externí odkaz:
https://doaj.org/article/20ecbb9c12c0433b933e9d98366b46ee
Autor:
Nilotpal Choudhury, Souvik Mahapatra
Publikováno v:
IEEE Transactions on Electron Devices. 69:6576-6581
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4efaab0930fbb59a9dd2ef339461ae06
https://doi.org/10.1109/ted.2022.3217714
https://doi.org/10.1109/ted.2022.3217714
Publikováno v:
IEEE Transactions on Electron Devices. 69:3596-3603
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::42b2fd922f3909d9965f42dc8456c49c
https://doi.org/10.1109/ted.2022.3175943
https://doi.org/10.1109/ted.2022.3175943
Autor:
Nilotpal Choudhury, Souvik Mahapatra
Publikováno v:
IEEE Transactions on Electron Devices. 69:3535-3541
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2a73dc816954a4b6353cfd42b6488697
https://doi.org/10.1109/ted.2022.3172055
https://doi.org/10.1109/ted.2022.3172055
Autor:
Suraj S. Cheema, Nirmaan Shanker, Li-Chen Wang, Cheng-Hsiang Hsu, Shang-Lin Hsu, Yu-Hung Liao, Matthew San Jose, Jorge Gomez, Wriddhi Chakraborty, Wenshen Li, Jong-Ho Bae, Steve K. Volkman, Daewoong Kwon, Yoonsoo Rho, Gianni Pinelli, Ravi Rastogi, Dominick Pipitone, Corey Stull, Matthew Cook, Brian Tyrrell, Vladimir A. Stoica, Zhan Zhang, John W. Freeland, Christopher J. Tassone, Apurva Mehta, Ghazal Saheli, David Thompson, Dong Ik Suh, Won-Tae Koo, Kab-Jin Nam, Dong Jin Jung, Woo-Bin Song, Chung-Hsun Lin, Seunggeol Nam, Jinseong Heo, Narendra Parihar, Costas P. Grigoropoulos, Padraic Shafer, Patrick Fay, Ramamoorthy Ramesh, Souvik Mahapatra, Jim Ciston, Suman Datta, Mohamed Mohamed, Chenming Hu, Sayeef Salahuddin
Publikováno v:
Nature, vol 604, iss 7904
With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage1. This led to a fundamental changein the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c4fe30529e321261100d5a1d53aa55c9
https://doi.org/10.1038/s41586-022-04425-6
https://doi.org/10.1038/s41586-022-04425-6
Publikováno v:
2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::52e8158a9c176c6b022d08719ecc7131
https://doi.org/10.1109/icsict55466.2022.9963349
https://doi.org/10.1109/icsict55466.2022.9963349
Autor:
Ravi Tiwari, Meng Duan, Mohit Bajaj, Denis Dolgos, Lee Smith, Hiu Yung Wong, Souvik Mahapatra
Publikováno v:
Solid-State Electronics. 202:108573
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0dae0efcebe8a8a9e397b6d262ccd14f
https://doi.org/10.1016/j.sse.2022.108573
https://doi.org/10.1016/j.sse.2022.108573
Autor:
Prasad Gholve, Payel Chatterjee, Chaitanya Pasupuleti, Hussam Amrouch, Narendra Gangwar, Shouvik Das, Uma Sharma, Victor M. van Santen, Souvik Mahapatra
Publikováno v:
Solid-State Electronics. 201:108586
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::18b807f6bfe55edf42e8b7955126e334
https://doi.org/10.1016/j.sse.2022.108586
https://doi.org/10.1016/j.sse.2022.108586
Autor:
Satyam Kumar, Dimple Kochar, Nilotpal Choudhury, Souvik Mahapatra, Narendra Parihar, Tarun Samadder
Publikováno v:
IEEE Transactions on Electron Devices. 68:485-490
A deterministic reaction-diffusion–drift model is used for the time kinetics of bulk gate insulator trap generation in p-channel Field Effect Transistors (FETs) under inversion stress. The consistency of the deterministic and stochastic versions of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::af221e765c4dd84b3a0db0053c7fafbf
https://doi.org/10.1109/ted.2020.3045960
https://doi.org/10.1109/ted.2020.3045960