Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Sounil Biswas"'
Publikováno v:
ITC
External loopback testing is an industry standard test for serializer-deserializer (SERDES) interfaces, and it is used to test for at-speed defects in the analog transmission (TX) and reception (RX) buffers. The specific test involves sending pseudor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::00d96d8f0a8fdcc342ac35411e6d3b7d
https://doi.org/10.1109/test.2016.7805841
https://doi.org/10.1109/test.2016.7805841
Autor:
Sounil Biswas, R.D. Blanton
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 30:148-158
Integrated, heterogeneous systems are comprehensively tested to verify whether their performance specifications fall within some acceptable ranges. However, explicitly testing every manufactured instance against all of its specifications can be expen
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d80dfe155f656ebaa637957f1dc20178
https://doi.org/10.1109/tcad.2010.2066630
https://doi.org/10.1109/tcad.2010.2066630
Autor:
Sounil Biswas, R.D. Blanton
Publikováno v:
IEEE Design & Test of Computers. 23:452-462
In this work, we use binary decision trees (BDTs) for statistical test compaction, because they have the following properties. First, decision trees require no assumption on the type of correlation (if any) that exists between Tred and Tkept. This ma
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::072b09614d410e761a7aef1d470557b1
https://doi.org/10.1109/mdt.2006.154
https://doi.org/10.1109/mdt.2006.154
Publikováno v:
VTS
Finding the cause of yield and reliability issues has never been an easy task for the product and test engineer. The challenge continues to grow as processes add more steps and contain more complicated interactions, as designs are pushed to the limit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c482a4b186a007b6a388196b36b8530a
https://doi.org/10.1109/vts.2014.6818766
https://doi.org/10.1109/vts.2014.6818766
Autor:
R.D. Blanton, Sounil Biswas
Publikováno v:
VTS
In test compaction, the objective is to reduce cost of testing an integrated system by applying a subset of its specification-based tests. One approach for accomplishing this objective is to statistically learn a correlation function for the tests el
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::92167dade7839a108211869aa58e69ba
https://doi.org/10.1109/vts.2009.59
https://doi.org/10.1109/vts.2009.59
Autor:
Sounil Biswas, R.D. Blanton
Publikováno v:
VTS
We propose a methodology that employs boolean minimization and optimized test covering to identify redundant tests of a mixed-signal circuit from its pass-fail (binary) test data. This methodology is applied to two in-production circuits, a high-spee
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::98e7d32ebac42a7fdaaf526aebb14c4b
https://doi.org/10.1109/vts.2008.35
https://doi.org/10.1109/vts.2008.35
Publikováno v:
DATE
Testing a non-digital integrated system against all of its specifications can be quite expensive due to the elaborate test application and measurement setup required. We propose to eliminate redundant tests by employing /spl epsi/-SVM based statistic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4821caabb5debdecde40c05e9186abd7
https://doi.org/10.1109/date.2005.277
https://doi.org/10.1109/date.2005.277
Publikováno v:
VTS
Fault tuples have introduced a fault model independent methodology for digital circuit test analysis. However, the {0, 1, X} algebra currently used with fault tuples allows only one form of path sensitization. The sensitization options for fault tupl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ff7df4c57201930d15fe40df60eff501
https://doi.org/10.1109/vtest.2004.1299256
https://doi.org/10.1109/vtest.2004.1299256