Zobrazeno 1 - 10
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pro vyhledávání: '"Son Juho"'
Akademický článek
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Autor:
Won-Sok Lee, Duhyun Lee, Sang Ho Jeon, Son Juho, D. Minn, Dae-Woong Kang, Sung-Gi Yang, Y. Aoki, J. Jang, Ki-chul Kim, Hyun-Chul Park, Jung-hyeon Kim, Soon-yeon Park, S. Kim, J. H. Lee, J.M. Park, B.S. Suh, M. Kim, Chung-woo Kim, Jung-Hyoung Lee, Kyung-Hoon Min, A.-S. Ryu, Young-Wug Kim, S.Y. Lee
Publikováno v:
2020 IEEE International Electron Devices Meeting (IEDM).
This paper presents design challenges and solutions for the fifth generation (5G) phased-array transceiver ICs in millimeter-wave (MMW) frequency bands. A 28nm bulk CMOS device technology is selected to integrate multiple RF phased-array elements in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d86ad2928f3bbabca4604eaa3f43d36b
https://doi.org/10.1109/iedm13553.2020.9371948
https://doi.org/10.1109/iedm13553.2020.9371948
Akademický článek
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Autor:
Lee Woojae, Jaehong Park, Sung-Gi Yang, Hyun-Chul Park, Kyu Hwan An, Jooseok Lee, Son Juho, Sangyong Park, Byungjoon Park, Yunsung Cho, Lee Jeongho, Seokhyeon Kim, Ji-Hoon Kim
Publikováno v:
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
This paper presents a 28-GHz 16-element phased-array transmitter for the fifth-generation (5G) new radio (NR) applications, focusing on the power amplifier (PA). The IC was fabricated using a 28-nm bulk CMOS technology with a flip-chip package, and e
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f359076d9ccc208a5f371ce69231d520
https://doi.org/10.1109/rfic.2019.8701791
https://doi.org/10.1109/rfic.2019.8701791
Autor:
Yoon Youngchang, Jang Jaesik, Sung-Gi Yang, Kyu Hwan An, Bohee Suh, Sung Tae Choi, Son Juho, Daehyun Kang, D. Minn, Lee Sangho, Jooseok Lee, Lee Jeongho, Ji-Hoon Kim, Ki-Hyun Kim, Mee-Ran Kim
Publikováno v:
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
This paper presents a 28GHz 16-element phased-array receiver in a 28nm bulk RF CMOS process targeting 5G NR application. The receiver implements a high-gain low-NF LNA, a linearity enhanced RF amplifier with post-distortion, and RF/IF step attenuator
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fd717c91ae8a1263c30123a6adfa4a43
https://doi.org/10.1109/rfic.2019.8701778
https://doi.org/10.1109/rfic.2019.8701778
Autor:
Jaehong Park, Sung-Gi Yang, Yunsung Cho, Hyun-Chul Park, Lee Jeongho, Byungjoon Park, Kyu Hwan An, Ji-Hoon Kim, Son Juho
Publikováno v:
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
We present a 39GHz CMOS cascode power amplifier (PA) with a two-step (L-C and C-L) second harmonic termination. We analyze the distortion mechanism in a cross-coupled capacitor neutralization technique and suggest the termination scheme to enhance bo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::693b8e2ae4f40a8f862a0ca96dcfcfd6
https://doi.org/10.1109/rfic.2019.8701809
https://doi.org/10.1109/rfic.2019.8701809
Autor:
Son Juho, Eun-Gyu Lee, Choul-Young Kim, Jeong-Taek Lim, Hyun-Myung Oh, Jae Eun Lee, Lee Jeongho, Chul Woo Byeon
Publikováno v:
Microwave and Optical Technology Letters. 59:128-131
In this article, a new design of a Wilkinson power divider is presented that offers substantially improved amplitude and reduced size characteristics over a broad frequency range compared to a conventional Wilkinson power divider. The improvement in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6463bc1e577df8fe76ffcbbaf2652725
https://doi.org/10.1002/mop.30244
https://doi.org/10.1002/mop.30244
Autor:
Byungjoon Park, Bumman Kim, Ji-Hoon Kim, Son Juho, Daechul Jeong, Kyunghoon Moon, Seokwon Lee
Publikováno v:
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
A highly linear power amplifier (PA) with ultra-wide video bandwidth is designed at a Ka-band for 5G application. To get a high linearity with high efficiency, a deep class-AB topology with 2nd harmonic control circuits is employed, reducing the 3rd
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bd1858a045f93b6d82532e3653afb907
https://doi.org/10.1109/rfic.2017.7969057
https://doi.org/10.1109/rfic.2017.7969057
Publikováno v:
Microwave and Optical Technology Letters. 56:2864-2867
This article presents a 60 GHz low insertion loss double-pole double-throw (DPDT) switch implemented in 65 nm standard CMOS process. To achieve the low insertion loss, various techniques are used such as the double-well body-floating, gate-floating,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2a656e64d33928369571b3c0cbe10574
https://doi.org/10.1002/mop.28713
https://doi.org/10.1002/mop.28713
Akademický článek
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