Zobrazeno 1 - 10
of 34
pro vyhledávání: '"Sol‐Kyu Lee"'
Autor:
Sol‐Kyu Lee, Young Woon Cho, Jong‐Sung Lee, Young‐Ran Jung, Seung‐Hyun Oh, Jeong‐Yun Sun, SangBum Kim, Young‐Chang Joo
Publikováno v:
Advanced Science, Vol 8, Iss 10, Pp n/a-n/a (2021)
Abstract Organic neuromorphic computing/sensing platforms are a promising concept for local monitoring and processing of biological signals in real time. Neuromorphic devices and sensors with low conductance for low power consumption and high conduct
Externí odkaz:
https://doaj.org/article/65d8929da1564451bb2e33842c026223
Autor:
Youngran Jung, Seung Hyun Oh, Jeong-Yun Sun, Young Woon Cho, Young-Chang Joo, Sol-Kyu Lee, Sangbum Kim, Jong-Sung Lee
Publikováno v:
Advanced Science, Vol 8, Iss 10, Pp n/a-n/a (2021)
Advanced Science
Advanced Science
Organic neuromorphic computing/sensing platforms are a promising concept for local monitoring and processing of biological signals in real time. Neuromorphic devices and sensors with low conductance for low power consumption and high conductance for
Autor:
Young-Chang Joo, Sol-Kyu Lee, Baek Jong-Min, Wookyung You, Ok-Hee Park, Hyeok-Sang Oh, Sekwon Na, So-Yeon Lee, Kyung-Tae Jang, Rak-Hwan Kim
Publikováno v:
IEEE Electron Device Letters. 39:1050-1053
Ruthenium (Ru) and cobalt (Co) are new candidates for the replacement of physical vapor deposition tantalum (Ta) in liner materials because Ru and Co have excellent Cu-filling properties when deposited using chemical vapor deposition (CVD). Under acc
Publikováno v:
Solid-State Electronics. 142:20-24
A novel inverted staggered metal-induced laterally crystallized (MILC) polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) with a combination of a planarized gate and an overlap/off-set at the source-gate/drain-gate structure were fabricat
Publikováno v:
Solid-State Electronics. 132:73-79
Low-temperature polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) fabricated via metal-induced crystallization (MIC) are attractive candidates for use in active-matrix flat-panel displays. However, these exhibit a large leakage current d
Publikováno v:
Solid-State Electronics. 129:6-9
We report a novel method to reduce source and drain (S/D) resistances, and to form a lightly doped layer (LDL) of bottom-gate polycrystalline silicon (poly-Si) thin-film transistors (TFTs). For application in driving TFTs, which operate under high dr
Publikováno v:
IEEE Transactions on Electron Devices. 64:432-437
Top gate-structured thin-film transistors (TFTs) have a channel inversion region that is directly connected to the doped source/drain area. This stands in contrast with normal bottom gate-structured TFTs that have a channel inversion region on the do
Publikováno v:
Journal of Applied Physics; 3/28/2016, Vol. 119 Issue 12, p124108-1-124108-8, 8p, 4 Diagrams, 4 Graphs
A study on the interfacial adhesion energy between capping layer and dielectric for cu interconnects
Autor:
Cheol Hong Kim, Young-Chang Joo, Sung Tae Kim, Kirak Son, So-Yeon Lee, Sol-Kyu Lee, Gahui Kim, Young-Bae Park
Publikováno v:
Microelectronics Reliability. 116:114020
Recently, Cu interconnect and low-k materials have been applied to reduce the interconnect resistive-capacitive delay issue. However, as the process node size is reduced to a few nanometers, high leakage currents appear through the dielectric under h
Autor:
Ki Hwan Seok, Hyung Yoon Kim, Hee Jae Chae, Zohreh Kiaee, Yong Hee Lee, Seung Ki Joo, Sol Kyu Lee, Gil Su Jang
Publikováno v:
MRS Advances. 1:3429-3433
In this paper, the electrical properties of bottom-gate (BG) polycrystalline silicon (poly-Si) thin-film transistors (TFTs) by NiSi2 seed-induced lateral crystallization (SILC) and its applications are presented. Sequential lateral solidification (SL