Zobrazeno 1 - 10
of 19
pro vyhledávání: '"Skyler Weaver"'
Autor:
Ajay Balankutty, Hyung Seok Kim, Kai Yu, Sandipan Kundu, Jihwan Kim, Rajeev K. Dokania, Skyler Weaver, Frank O'Mahony, Amr Elshazly, Dan Shi
Publikováno v:
IEEE Journal of Solid-State Circuits. 54:29-42
This paper presents a reconfigurable 56 GS/s transmitter (TX) that operates up to 112 Gb/s with four-level pulse-amplitude modulation (PAM-4) and at 56 Gb/s with non-return-to-zero (NRZ) modulation scheme. Fabricated in the 10-nm FinFET technology, t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1ae1a306d4c3301ddee9ea03aa244020
https://doi.org/10.1109/jssc.2018.2874040
https://doi.org/10.1109/jssc.2018.2874040
Autor:
Sandipan Kundu, Rajeev K. Dokania, Kai Yu, Ajay Balankutty, Frank O'Mahony, Skyler Weaver, Amr Elshazly, Jihwan Kim, Hyung Seok Kim
Publikováno v:
ISSCC
The rapidly growing demand for high-bandwidth data communication infrastructure has fueled the industry to develop ultra-high-speed/density wireline links compliant with electrical interface standards such as CEI-56G and 802.3bs–400GbE. Recent publ
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9a3d5a4825e551544403f87f0b9f6a89
https://doi.org/10.1109/isscc.2018.8310204
https://doi.org/10.1109/isscc.2018.8310204
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 61:84-91
It is demonstrated in this paper that it is possible to synthesize a stochastic flash ADC entirely from Verilog code and a standard digital library. An analog comparator is introduced that is constructed from two cross-coupled 3-input digital NAND ga
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6390122ffb2f9b52e1ace2e343b6f503
https://doi.org/10.1109/tcsi.2013.2268571
https://doi.org/10.1109/tcsi.2013.2268571
Publikováno v:
ISSCC
In this paper the fundamental concept of ring amplification is introduced and explored. Ring amplifiers enable efficient amplification in scaled environments, and possess the benefits of efficient slew-based charging, rapid stabilization, compression
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d377a3b14345d402134d294b2607a2cf
https://doi.org/10.1109/jssc.2012.2217865
https://doi.org/10.1109/jssc.2012.2217865
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 58:744-747
A low-power synthesizable analog-to-digital converter (ADC) is presented. By cascading many digital-like domino-logic cells whose propagation delay is influenced by an analog input voltage, a digital value is obtained at the end of the allowed ripple
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::90f04b52459ee9208ad15a93de83f9d3
https://doi.org/10.1109/tcsii.2011.2168019
https://doi.org/10.1109/tcsii.2011.2168019
Publikováno v:
IEEE Journal of Solid-State Circuits. 45:2623-2633
Building on the technique of correlated level shifting (CLS), Split-CLS is introduced as a viable way to enable the design of high performance, high resolution A/D converters in deep submicron CMOS processes. One possible implementation of Split-CLS
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a1e69cb65f41a4060f4c409bf8193124
https://doi.org/10.1109/jssc.2010.2073190
https://doi.org/10.1109/jssc.2010.2073190
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 57:2825-2833
A stochastic flash analog-to-digital converter (ADC) is presented. A standard flash uses a resistor string to set individual comparator trip points. A stochastic flash ADC uses random comparator offset to set the trip points. Since the comparators ar
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::982d05203cacacebcd3401bd15036071
https://doi.org/10.1109/tcsi.2010.2050225
https://doi.org/10.1109/tcsi.2010.2050225
Autor:
Adam C. Faust, Alexandra M. Kern, Christiaan Bil, Skyler Weaver, Mike He, Rajeev K. Dokania, Frank O'Mahony, Richard Tseng, Tao Liang, Kai Yu
Publikováno v:
ISSCC
High-speed serial links integrated in advanced CMOS are ubiquitous in modern microprocessor systems. These commodity links have fixed performance specs and therefore realize the benefit of technology scaling in area and power reduction at high data r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8f7727bb1b00de1a430f76c7ebbe3e9c
https://doi.org/10.1109/isscc.2015.7062987
https://doi.org/10.1109/isscc.2015.7062987
Publikováno v:
VLSIC
A ring amplifier based pipelined ADC is presented that uses simple cells constructed from small inverters and capacitors to perform amplification. The basic ring amplifier structure is characterized and demonstrated to be highly scalable, power effic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0d018f80a86b90dd6a200b62c35a37a4
https://doi.org/10.1109/vlsic.2012.6243775
https://doi.org/10.1109/vlsic.2012.6243775
Publikováno v:
ISCAS
The relation between opamp noise and the size of the level shifting capacitor in correlated level-shifting (CLS) architectures is explored. Analysis is performed for a Split-CLS switched capacitor amplification circuit, and many of the conclusions in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::763bdfaaa45783d6a63423bcb39dfd1c
https://doi.org/10.1109/iscas.2012.6272200
https://doi.org/10.1109/iscas.2012.6272200