Zobrazeno 1 - 10
of 42
pro vyhledávání: '"Sk. Subidh Ali"'
Autor:
Yogendra Sao, Sk. Subidh Ali
Publikováno v:
IEEE Transactions on Information Forensics and Security. 18:2842-2855
Publikováno v:
2022 IEEE European Test Symposium (ETS).
Autor:
Yogendra Sao, Sk Subidh Ali
Publikováno v:
2021 IEEE 39th International Conference on Computer Design (ICCD).
Publikováno v:
ETS
Scan based DfT is the de facto standard for testing the functional and structural correctness of chips. It provides high observability and controllability of internal latches leading to enhanced fault coverage, but can also induce vulnerability in cr
Publikováno v:
AsianHOST
Scan-based Design for Testability (DfT) provides high fault coverage, observability, and testability of internal nodes of the chip. It can serve as a medium for the attacker to launch a side-channel attack and thus reveal the secret key embedded in t
Publikováno v:
Microelectronics Reliability. 123:114216
Scan based DfT is indispensable for IC testing in the semiconductor chip industry to ensure correctness of chip, both functionally and structurally. Since a higher degree of fault coverage is essential, cryptographic ICs rely on it as a standard tech
Publikováno v:
IEEE Transactions on Emerging Topics in Computing. 5:317-328
Scaling down CMOS technology results in excessive power dissipation issues. Nanoelectromechanical System (NEMS) relay technology is an alternative emerging solution that overcomes the power dissipation limitation of CMOS technology. However, despite
Publikováno v:
2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems. 22:1-26
In this article, we present a compact implementation of the Salsa20 stream cipher that is targeted towards lightweight cryptographic devices such as radio-frequency identification (RFID) tags. The Salsa20 stream cipher, ann addition-rotation-XOR (ARX
Publikováno v:
IEEE Micro. 36:50-61
During the past few decades, the electronics community has witnessed a growing demand for packing more and more functionalities onto a single chip. The CMOS industry has been fulfilling this demand by continually shrinking the feature sizes, now down