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pro vyhledávání: '"Simon H. Gharibyan"'
Autor:
Nune H. Beglaryan, Vardan P. Grigoryants, Zaven M. Avetisyan, Andranik K. Hayrapetyan, Simon H. Gharibyan, Artur Kh. Mkhitaryan, Vazgen Melikyan, Gegham A. Petrosyan
Publikováno v:
EWDTS
Low power, area efficient clocked comparator with high resolution was designed in SAED 32/28nm CMOS process for SAR ADC applications. The analog comparator is based on digital cells, hence doesn't have stability issues, mismatches induced by the diff
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da421d9e0951d17682cdfee2ea3e0b86
https://doi.org/10.1109/ewdts.2018.8524737
https://doi.org/10.1109/ewdts.2018.8524737
