Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Shyam Parthasarathy"'
Publikováno v:
2022 International Conference on Intelligent Innovations in Engineering and Technology (ICIIET).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dd43e2b59c3be968038372db30e19c2b
https://doi.org/10.1109/iciiet55458.2022.9967683
https://doi.org/10.1109/iciiet55458.2022.9967683
Autor:
Rui Tze Toh, Shaoqiang Zhang, Hin Kiong Yap, Jen Shuang Wong, Diing Shenp Ang, Shyam Parthasarathy
Publikováno v:
IEEE Electron Device Letters. 39:1346-1349
Results specific to power amplifiers (PAs) designed using a SOI EDNMOS transistor free of kinks in ID-VD plane and high breakdown voltage are presented. The suppression of the drain current kink and improvement in breakdown voltage are achieved by th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::68d62cfe42b81fa89532362c236c8beb
https://doi.org/10.1109/led.2018.2855442
https://doi.org/10.1109/led.2018.2855442
Autor:
Shyam Parthasarathy, Kok Wai Johnny Chew, Madabusi Govindarajan, Shaoqiang Zhang, Rui Tze Toh, Jen Shuang Wong, Luis Audia, Diing Shenp Ang
Publikováno v:
2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
Technology benchmarking results specific to power amplifiers (PA) application designed using extended drain NMOS (EDNMOS) on SOI is presented. Improved kink free conductance characteristics of this device leads to superior performance when the optimi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5673337f6e67080abd485b0c4920f265
https://doi.org/10.1109/rfic.2018.8429029
https://doi.org/10.1109/rfic.2018.8429029
Autor:
Xi Sung Loo, Rui Tze Toh, Tao Sun, Kok Wai Johnny Chew, Jen Shuang Wong, Purakh Raj Verma, Shyam Parthasarathy, Shaoqiang Zhang
Publikováno v:
2017 IEEE 17th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF).
CMOS Silicon on Insulator (SOI) is now the technology of choice for RF switches in front end module systems. The emergence of 4G cellular systems with carrier aggregation has made the design of front end modules more complex. To take into account the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d44a7867e31333e0b78e48ce662f3ff2
https://doi.org/10.1109/sirf.2017.7874382
https://doi.org/10.1109/sirf.2017.7874382
Autor:
Madabusi Govindarajan, Rui Tze Toh, Diing Shenp Ang, Shyam Parthasarathy, Tao Sun, Chao Song Zhu, Shaoqiang Zhang, Venkata Sudheer Nune, Yong Koo Yoo, Kok Wai Johnny Chew, Raj Verma Purakh, Jen Shuang Wong
Publikováno v:
2016 IEEE International Electron Devices Meeting (IEDM).
A novel approach to technology integration of system-on-chip RF Front-End Module (FEM) is presented. Device design to achieve best-in-class extended drain power mosfet (EDNMOS) with Ron of 1.6Ohm-mm and f T >39GHz is discussed. This is followed by an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b74b55bb5d9f002912424355c3cbbea
https://doi.org/10.1109/iedm.2016.7838031
https://doi.org/10.1109/iedm.2016.7838031
Akademický článek
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Akademický článek
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Autor:
Randy L. Wolf, Robert M. Rassel, Shyam Parthasarathy, Mccallum-Cook Ian, Hanyi Ding, K. Newton, Renata Camillo-Castillo, Anthony K. Stamper, Mark D. Jaffe, Alvin J. Joseph, James S. Dunn, Michael J. Zierak, Srikanth Srihari, Vibhor Jain, Nicholas Theodore Schmidt
Publikováno v:
2014 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1651b1e12c438e8df1171a884ce0492b
https://doi.org/10.1109/bctm.2014.6981278
https://doi.org/10.1109/bctm.2014.6981278
Autor:
Frederick G. Anderson, Robert A. Groves, Shyam Parthasarathy, Ananth Sundaram, Balaji Swaminathan, Randy L. Wolf
Publikováno v:
2010 International Electron Devices Meeting.
This paper describes a large signal Silicon on Insulator (SOI) substrate modeling methodology for high power circuit applications such as RF Switches. It is shown that the use of a varactor in place of a linear capacitor representing the buried oxide
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d7dbf5a59e2b834db25b1ac6a435bd22
https://doi.org/10.1109/iedm.2010.5703320
https://doi.org/10.1109/iedm.2010.5703320
Autor:
Michael Claus Olsen, Amit Ranjan Trivedi, Shyam Parthasarathy, Ali Tombak, Yogesh Singh Chauhan, Michael Carroll, Robert A. Groves, D. Kerr, P. Mason, Saurabh Sirohi
Publikováno v:
VLSI Design
A single-pole double-throw novel switch device in0.18¹m SOI complementary metal-oxide semiconductor(CMOS) process is developed for 0.9 Ghz wireless GSMsystems. The layout of the device is optimized keeping inmind the parameters of interest for the R
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b9fcd8b148cebc77a0e5df3fb589307f
https://doi.org/10.1109/vlsi.design.2010.64
https://doi.org/10.1109/vlsi.design.2010.64