Zobrazeno 1 - 10
of 39
pro vyhledávání: '"Shuhei Tanakamaru"'
Autor:
Ken Takeuchi, Shuhei Tanakamaru, Darlene Viviani, Thomas Rueckes, Sheyang Ning, Monte Manning, Henry Huang, Tomoko Ogura Iwasaki
Publikováno v:
IEEE Journal of Solid-State Circuits. 51:1938-1951
A novel error correction scheme, called reset-check-reverse-flag (RCRF), is proposed to improve the reliability of storage class memories (SCMs). RCRF divides the conventional Bose-Chaudhuri-Hocquenghem (BCH) code length into multiple subsections. On
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::adb6529d9d669070af18446d604c84af
https://doi.org/10.1109/jssc.2016.2561966
https://doi.org/10.1109/jssc.2016.2561966
Publikováno v:
IEICE Transactions on Electronics. :444-451
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bc803412ff3d95ccd3896e69bb76aa45
https://doi.org/10.1587/transele.e99.c.444
https://doi.org/10.1587/transele.e99.c.444
Autor:
Ken Takeuchi, Shuhei Tanakamaru
Publikováno v:
VLSI Design and Test for Systems Dependability ISBN: 9784431565925
This chapter discusses how to build dependable nonvolatile memory systems that range from the SD card to high-performance enterprise storage. The nonvolatile memory systems are mainly composed of NAND flash memories because of their high bit density.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3cae7552f4c5ccad448d1a98db30ce8a
https://doi.org/10.1007/978-4-431-56594-9_18
https://doi.org/10.1007/978-4-431-56594-9_18
Autor:
Ken Takeuchi, Shuhei Tanakamaru, Hiroshi Kawaguchi, Jinwook Jung, Hajime Shimada, Takashi Sato, Yuta Kimi, Masanori Hashimoto, Seiji Kajihara, Masahiko Yoshimoto, Yasuo Sato, Jun Yao
Publikováno v:
VLSI Design and Test for Systems Dependability ISBN: 9784431565925
Advancement of process technologies has significantly improved the performance of semiconductor devices and consequently of circuits. Device lifetime, on the other hand, has been unavoidably compromised through the introductions of new materials, new
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::358567496b2cf02f037c48fa6f92578a
https://doi.org/10.1007/978-4-431-56594-9_6
https://doi.org/10.1007/978-4-431-56594-9_6
Publikováno v:
Solid-State Electronics. 111:129-140
To improve the reliability of NAND Flash memory based solid-state drives (SSDs), error-prediction LDPC (EP-LDPC) has been proposed for multi-level-cell (MLC) NAND Flash memory (Tanakamaru et al., 2012, 2013), which is effective for long retention tim
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0960dc5d794ba0e6da80f113e30392d1
https://doi.org/10.1016/j.sse.2015.05.034
https://doi.org/10.1016/j.sse.2015.05.034
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 62:844-853
This paper proposes design methodology for highly reliable, high performance ReRAM and 3-bit/cell multi-level cell (MLC) NAND flash solid-state storage. Six techniques, calibrated RRef (CR), flexible RRef (FR), adaptive asymmetric coding (AAC), verif
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a8d98d286d0df57536d0752a95609c6a
https://doi.org/10.1109/tcsi.2014.2370171
https://doi.org/10.1109/tcsi.2014.2370171
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 62:771-780
This paper proposes highly reliable coding methods for applications in two extreme conditions. n-out-of-8 level cell (nLC) is proposed for archival applications which require significantly long data-retention time with small write/erase cycle. On the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2ba1ec5ed944a0998d89d40736c45ddc
https://doi.org/10.1109/tcsi.2014.2380640
https://doi.org/10.1109/tcsi.2014.2380640
Publikováno v:
IEICE Transactions on Electronics. :53-61
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8cbe1825e794468fb292c9b46ce92e47
https://doi.org/10.1587/transele.e98.c.53
https://doi.org/10.1587/transele.e98.c.53
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. :1-12
A nand flash memory/storage-class memory (SCM) hybrid solid-state drive (SSD) can achieve higher performance than the conventional nand flash-only SSD. Error-correcting codes (ECCs) are applied to the SSD to correct bit errors occurring inside the na
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ea2df9ae4014d7f4826a8392a4f2257f
https://doi.org/10.1109/tvlsi.2015.2496976
https://doi.org/10.1109/tvlsi.2015.2496976
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 61:1119-1132
The proposed unified solid-state storage (USSS) with hybrid NAND flash memory/ReRAM provides high system-level data protection. In the conventional storage system, the hierarchical storage architecture (Server/Disk array/SSD/NAND flash memory) has du
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cbea64c19eb01c4ca4d518c4e07f592a
https://doi.org/10.1109/tcsi.2013.2285891
https://doi.org/10.1109/tcsi.2013.2285891