Zobrazeno 1 - 10
of 40
pro vyhledávání: '"Shubhendu S. Mukherjee"'
Publikováno v:
IEEE Computer Architecture Letters. 7:21-24
ACE (architecturally correct execution) analysis computes AVFs (architectural vulnerability factors) of hardware structures. AVF expresses the fraction of radiation-induced transient faults that result in user-visible errors. Architects usually perfo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ef95f517a54f146d222ea4ab9d63e593
https://doi.org/10.1109/l-ca.2007.19
https://doi.org/10.1109/l-ca.2007.19
Autor:
Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August, Shubhendu S. Mukherjee, George A. Reis
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 2:366-396
Traditional fault-tolerance techniques typically utilize resources ineffectively because they cannot adapt to the changing reliability and performance demands of a system. This paper proposes software-controlled fault tolerance, a concept allowing de
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f32d044cd37e673fbc8b2c253f4d82fc
https://doi.org/10.1145/1113841.1113843
https://doi.org/10.1145/1113841.1113843
Publikováno v:
IEEE Micro. 24:30-37
Single-bit upsets from transient faults have emerged as a key challenge in microprocessor design. Soft errors will be an increasing burden for microprocessor designers as the number of on-chip transistors continues to grow exponentially. Unlike tradi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cd33557cbe374d29ef9e9f8397937d98
https://doi.org/10.1109/mm.2004.86
https://doi.org/10.1109/mm.2004.86
Publikováno v:
IEEE Transactions on Parallel and Distributed Systems. 15:257-272
Network performance in tightly-coupled multiprocessors typically degrades rapidly beyond network saturation. Consequently, designers must keep a network below its saturation point by reducing the load on the network. Congestion control via source thr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::222316fe654fa7ac06f96e181503f8d6
https://doi.org/10.1109/tpds.2004.1264810
https://doi.org/10.1109/tpds.2004.1264810
Publikováno v:
IEEE Micro. 23:70-75
The continuous exponential growth in transistors per chip as described by Moore's law has spurred tremendous progress in the functionality and performance of semiconductor devices, particularly microprocessors. At the same time, each succeeding techn
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0ae008cb6d15521e4ea6cb05932c32c6
https://doi.org/10.1109/mm.2003.1261389
https://doi.org/10.1109/mm.2003.1261389
Autor:
Shubhendu S. Mukherjee, Federico Silla, David Wightman Webb, Steve Lang, Peter J. Bannon, Joel Emer
Publikováno v:
RiuNet. Repositorio Institucional de la Universitat Politécnica de Valéncia
instname
ASPLOS
instname
ASPLOS
Interconnection networks usually consist of a fabric of interconnected routers, which receive packets arriving at their input ports and forward them to appropriate output ports. Unfortunately, network packets moving through these routers are often de
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2e876302e9b700ccd841fe88297eb836
https://doi.org/10.1145/635506.605421
https://doi.org/10.1145/635506.605421
Publikováno v:
ISCA
Exponential growth in the number of on-chip transistors, coupled with reductions in voltage levels, makes each generation of microprocessors increasingly vulnerable to transient faults. In a multithreaded environment, we can detect these faults by ru
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::377891fbd881634487109215115a8247
https://doi.org/10.1145/545214.545227
https://doi.org/10.1145/545214.545227
Autor:
Harish Patil, Shubhendu S. Mukherjee, Nathan Binkert, Roger Espasa, Steven Wallace, Pritpal S. Ahuja, S. Manne, Chi-Keung Luk, Artur Klauser, Joel Emer, Toni Juan, E. Borch
Publikováno v:
Computer. 35:68-76
The longevity and usefulness of a microprocessor performance model has historically depended on the model writer's skills and discipline. However, at Compaq the models became extremely complex and unmanageable because designers lacked a structured wa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::415dd68def97c75a45da02d81a3147d0
https://doi.org/10.1109/2.982918
https://doi.org/10.1109/2.982918
Publikováno v:
Hot Interconnects
The Alpha 21364 processor provides a high-performance, highly scalable, and highly reliable network architecture. The router runs at 1.2 GHz and routes packets at a peak bandwidth of 22.4 GB/s. The network architecture scales up to a 128-processor co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5318571497f611b55547d0bed102f3ef
https://doi.org/10.1109/40.988687
https://doi.org/10.1109/40.988687
Autor:
Shubhendu S. Mukherjee, Mark D. Hill
Publikováno v:
ACM SIGARCH Computer Architecture News. 26:179-190
Most large shared-memory multiprocessors use directory protocols to keep per-processor caches coherent. Some memory references in such systems, however, suffer long latencies for misses to remotely-cached blocks. To ameliorate this latency, researche
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::443ad48463ba1cacd191b516df002714
https://doi.org/10.1145/279361.279386
https://doi.org/10.1145/279361.279386