Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Shouchang Tsao"'
Autor:
Sridhar Yadala, T. Ip, James Lan, Sharon Huynh, C. Liang, J. Lakshmipathi, Khanh Nguyen, Hung-Szu Lin, D. Pantelakis, Mehrdad Mofidi, Teruhiko Kamei, Long Pham, Siu Chan, Jeffrey W. Lutze, V. Sakhamuri, Jason Li, Jong Hak Yuh, Junnhui Yang, Koichi Kawakami, Kishan Pradhan, Yan Li, P. Kliza, Masaaki Higashitani, James Chan, Khin Htoo, Tai-Yuan Tseng, Alan Li, Yasuyuki Fukuda, Binh Quang Le, Shu-Fen Chang, Raul Adrian Cernea, Khandker N. Quader, Hideo Mukai, Subodh Taigor, Shouchang Tsao, Yingda Dong, Takumi Abe, Farookh Moogat, Fanglin Zhang, H. Nasu, Cynthia Hsu, Jayson Hu, Feng Pan
Publikováno v:
IEEE Journal of Solid-State Circuits. 44:186-194
A 16 Gb 4-state MLC NAND flash memory augments the sustained program throughput to 34 MB/s by fully exercising all the available cells along a selected word line and by using additional performance enhancement modes. The same chip operating as an 8 G
Autor:
Koji Hosono, M. Kojima, Shigeo Ohshima, Susumu Fujimura, Shouchang Tsao, N. Hayashida, H. Waki, Ken Oowada, Jeffrey W. Lutze, Makoto Iwai, G. Hemink, Kiyofumi Sakurai, H. Otake, Sumio Tanaka, Mehrdad Mofidi, Shih-Chung Lee, Y. Nozawa, Yohji Watanabe, Y. Kameda, Ken Takeuchi, Jun Wan, Masanobu Shirakawa, K. Hatakeyama, A. Cernea, Teruhiko Kamei, Yoshihiko Shindo, Hitoshi Shiga, Yan Li, Takuya Futatsuyama, Jia-Yi Fu, Masaaki Higashitani, Masayuki Ichige, K. Kanazawa, Naoya Tokiwa, Shinji Sato
Publikováno v:
IEEE Journal of Solid-State Circuits. 42:219-232
A single 3.3-V only, 8-Gb NAND flash memory with the smallest chip to date, 98.8 mm2, has been successfully developed. This is the world's first integrated semiconductor chip fabricated with 56-nm CMOS technologies. The effective cell size including
Autor:
D. Pantelakis, Hung-Szu Lin, K. Kawakamr, P. Kliza, Kishan Pradhan, Shu-Fen Chang, Jason Li, Masaaki Higashitani, Sridhar Yadala, Feng Pan, Jong Park, Jayson Hu, Junhui Yang, Takumi Abe, Yan Li, Khin Htoo, Khanh Nguyen, Farookh Moogat, Fanglin Zhang, Binh Quang Le, V. Sakhamuri, Raul-Adrian Cernea, Siu Chan, H. Mukai, H. Nasu, Cynthia Hsu, Khandker N. Quader, Tai-Yuan Tseng, Yasuyuki Fukuda, Yingda Dong, Shouchang Tsao, Subodh Taigor, Long Pham, Jeffrey W. Lutze, James Chan, A. Li, T. Ip, Teruhiko Kamei, James Lan, J. Lakshmipathi, C. Liang, Mehrdad Mofidi, Sharon Huynh
Publikováno v:
ISSCC
In the diverse world of NAND flash applications, higher storage capacity is not the only imperative. Increasingly, performance is a differentiating factor and is also a way of creating new markets or expanding existing markets. While conventional mem
Autor:
Shouchang Tsao, H. Waki, Ken Oowada, K. Hatakeyama, Y. Nozawa, Masanobu Shirakawa, M. Kojima, Y. Kameda, Ken Takeuchi, Makoto Iwai, Koji Hosono, S. Tanaka, Teruhiko Kamei, Jeffrey W. Lutze, Naoya Tokiwa, H. Otake, Yoshihiko Shindo, Shih-Chung Lee, Yohji Watanabe, M. Higashitani, Jia-Yi Fu, Hitoshi Shiga, Shigeo Ohshima, G. Hemink, Susumu Fujimura, N. Hayashida, Shinji Sato, A. Cernea, Jun Wan, Kiyofumi Sakurai, Mehrdad Mofidi, K. Kanazawa, Masayuki Ichige, Yan Li, Takuya Futatsuyama
Publikováno v:
ISSCC
Fabricated in 56nm CMOS technology, an 8Gb multi-level NAND Flash memory occupies 98.8mm2, with a memory cell size of 0.0075mum/b. The 10MB/s programming and 93ms block copy are also realized by introducing 8kB page, noise-cancellation circuits, exte
Autor:
Cernea, R., Long Pham, Farookh Moogat, Siu Chan, Binh Le, Yan Li, Shouchang Tsao, Tai-Yuan Tseng, Khanh Nguyen, Li, J., Hu, J., Jong Park, Hsu, C., Fanglin Zhang, Kamei, T., Nasu, H., Kliza, P., Khin Htoo, Lutze, J., Yingda Dong
Publikováno v:
2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers; 2008, p420-624, 205p