Zobrazeno 1 - 10
of 91
pro vyhledávání: '"Shiro Kamohara"'
Autor:
Yoshiro Tajitsu, Jun Takarada, Tokiya Hikichi, Ryoji Sugii, Kohei Takatani, Hiroki Yanagimoto, Riku Nakanishi, Seita Shiomi, Daiki Kitamoto, Takuo Nakiri, Osamu Takeuchi, Miki Deguchi, Takanori Muto, Kazuaki Kuroki, Wataru Amano, Ayaka Misumi, Mitsuru Takahashi, Kazuki Sugiyama, Akira Tanabe, Shiro Kamohara, Rei Nisho, Koji Takeshita
Publikováno v:
Micromachines, Vol 14, Iss 1, p 143 (2023)
We attempted to realize a prototype system that monitors the living condition of indoor dogs without physical or mental burden by using a piezoelectric poly-l-lactic acid (PLLA) braided cord as a wearable sensor. First, to achieve flexibility and dur
Externí odkaz:
https://doaj.org/article/19512f2821bb49748aa095dc4d51a606
Autor:
Nobuyuki Sugii, Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi, Koichiro Ishibashi, Tomoko Mizutani, Toshiro Hiramoto
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 4, Iss 2, Pp 65-76 (2014)
Ultralow-voltage (ULV) CMOS will be a core building block of highly energy efficient electronics. Although the operation at the minimum energy point (MEP) is effective for ULP CMOS circuits, its slow operation speed often means that it is not used in
Externí odkaz:
https://doaj.org/article/5bc1b97d48ca46e483d2c4404c17e5db
Publikováno v:
The Frontiers Collection ISBN: 9783030183370
Ultra-low power technology has drawn much attention recently as the number of connecting (Internet-of-Things) devices rapidly increases. The silicon-on-thin-buried oxide (SOTB) technology is a CMOS device technology that uses fully depleted silicon-o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::747367c936bfe79bdb691fba4c13b4a8
https://doi.org/10.1007/978-3-030-18338-7_6
https://doi.org/10.1007/978-3-030-18338-7_6
Autor:
Yoshiki Yamamoto, Kiyoshi Takeuchi, Hao Qiu, Tomoko Mizutani, Hideki Makiyama, Nobuyuki Sugii, Hidekazu Oda, Shiro Kamohara, Toshiro Hiramoto, Masaharu Kobayashi, Takuya Saraya, Tomohiro Yamashita
Publikováno v:
IEEE Transactions on Electron Devices. 63:4302-4308
Four write stability metrics for the characterization of six-transistor SRAM cells were experimentally evaluated and compared at low supply voltage ( $V_{\mathrm {DD}})$ . A silicon-on-thin-BOX technology with reduced body doping was used to achieve
Autor:
Yoshiki Yamamoto, Shinji Tanaka, Hiroki Shinkawata, Yukiko Umemoto, Shiro Kamohara, Makoto Yabuuchi, Takumi Hasegawa, Kyoji Ito, Koji Nii, Yohei Sawada, Yoshihiro Shinozaki
Publikováno v:
2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
In 65-nm Silicon-on-Thin-Box (SOTB) technology, we demonstrate fully functional embedded 6T single-port (SP) SRAM and 8T dual-port (DP) SRAM for Smart Internet-of-Things (IoT) applications. By using back-bias (BB) control in the sleep mode, 13.72 nW/
Autor:
Noriyuki Iguchi, Yoshiki Yamamoto, Nobuyuki Sugii, Yasuhiro Ogasahara, Takumi Hasegawa, Naoki Banno, Shinobu Okanishi, Yasushi Yamagata, Keiichi Maekawa, Makoto Miyamura, Shiro Kamohara, Hideki Makiyama, Munehiro Tada, Toshitsugu Sakamoto, Hidekazu Oda, Hiromitsu Hada, Koichiro Okamoto, Yukihide Tsuji
Publikováno v:
IEEE Micro. 35:13-23
The authors demonstrate an ultra-low-power microcontroller unit (MCU) with an embedded atom-switch ROM, which performs 0.39-V operation voltage and 18.26-pJ/cycle minimum active energy (or 18.26-µW/MHz minimum active power) at 14.3 MHz. The MCU is f
Autor:
Yoshiki Yamamoto, Hideki Makiyama, Toshiro Hiramoto, Masaharu Kobayashi, Shiro Kamohara, Yasuo Yamaguchi, Tomohiro Yamashita, Tomoko Mizutani, Hidekazu Oda, Nobuyuki Sugii
Publikováno v:
ECS Transactions. 66:43-48
Highly energy efficient CMOS circuits are required in theinternet-of-things (IoT) era since a great number of smallelectronic apparatuses process and communicate data. Ultralow-voltage (ULV) operation of CMOS circuits is effective for significantly r
Autor:
Takumi Hasegawa, Makoto Yabuuchi, Shinji Tanaka, Kyoji Ito, Koji Nii, Hiroki Shinkawata, Shiro Kamohara, Yoshiki Yamamoto, Yohei Sawada, Yoshihiro Shinozaki
Publikováno v:
2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).
An embedded 2-read/write (2RW) dual-port (DP) SRAM using 65-nm Silicon-on-Thin-Box (SOTB) is demonstrated. 25.85 nW/Mbit ultra-low standby power is observed by applying back-bias (BB) control in the sleep mode, reduced to 1/1000 compared to the norma
Autor:
Yoshiki Yamamoto, Shiro Kamohara, Shinji Tanaka, Takumi Hasegawa, Hiroki Shinkawata, Makoto Yabuuchi, Yoshihiro Shinozaki, Koji Nii
Publikováno v:
2017 Symposium on VLSI Circuits.
A 65-nm Silicon-on-Thin-Box (SOTB) embedded SRAM is demonstrated. By using back-bias (BB) control in the sleep mode, 13.72 nW/Mbit ultra-low standby power is observed, which is reduced to 1/1000 compared to the normal standby mode. The measured read
Autor:
Hideki Makiyama, Yoshiki Yamamoto, Yasuo Yamaguchi, Hiroki Shinkawata, Shiro Kamohara, Takumi Hasegawa
Publikováno v:
ICICDT
Ultra low power performance is indispensable for Micro Controller Unit (MCU) used as wireless sensor and communication nodes which needs battery maintenance free and energy harvesting operation in the Internet of things (IoT) era. The Silicon on Thin