Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Shing-Chi Wang"'
Autor:
Shing-Chi Wang, Jorge Aguirre, Peter Schvan, Philip Flemeke, Stefan Szilagyi, Marinette Besson, Naim Ben-Hamida, Daniel Pollex, Yuriy M. Greshishchev, Robert Gibbins, Chris Falt
Publikováno v:
ISSCC
Modern optical systems increasingly rely on DSP techniques for data transmission at 40Gbs and recently at 100Gbs and above. A significant challenge towards CMOS TX DSP SoC integration is due to requirements for four 6b DACs (Fig. 10.8.1) to operate a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c07f0c7af1907cc027c021a14765980a
https://doi.org/10.1109/isscc.2011.5746279
https://doi.org/10.1109/isscc.2011.5746279
Autor:
Shing-Chi Wang, Jeorge Aguirre, Robert Gibbins, Daniel Pollex, Yuriy M. Greshishchev, Philip Flemke, Chris Falt, Marinette Besson, Naim Ben-Hamida, Peter Schvan
Publikováno v:
ISSCC
Progress in 40Gb/s optical dual- polarization (DP) QPSK systems inspired an idea of 100G transmission by optical frequency division multiplexing (FDM) of QPSK-modulated channels [1]. A practical solution suggests two 58Gb/s DP QPSK channels, spaced b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::14de71936babb156b2463af31cc5c54f
https://doi.org/10.1109/isscc.2010.5433972
https://doi.org/10.1109/isscc.2010.5433972
Autor:
Shing-Chi Wang, John Sitch, Daniel Pollex, Yuriy M. Greshishchev, Phillip Flemke, Naim Ben-Hamida, Peter Schvan, Chris Falt
Publikováno v:
ICECS
A clock recovery circuit for a 40Gb/s optical coherent receiver realized in CMOS 90nm technology is presented. The core PLL generates less 0.3ps rms jitter for a bandwidth of 0.5MHz. This is mainly due to the on-chip differential LC VCO with power su
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3f93fd6ea59402278d06583628885823
https://doi.org/10.1109/icecs.2009.5410782
https://doi.org/10.1109/icecs.2009.5410782
Autor:
J. Bach, Daniel Pollex, Yuriy M. Greshishchev, C. Fait, John Sitch, Naim Ben-Hamida, Peter Schvan, Robert Gibbins, P. Flemke, Shing-Chi Wang, J. Wolczanski
Publikováno v:
ISSCC
This paper presents a 24 GS/s 6 b ADC in 90 nm CMOS with the highest ENOB up to 12 GHz input frequency and lowest power consumption of 1.2 W compared to ADCs with similar performance. It uses an interleaved architecture of SAR type self-calibrating c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a452fa9224491b19fa3dce75544dd7d8
https://doi.org/10.1109/isscc.2008.4523298
https://doi.org/10.1109/isscc.2008.4523298
Publikováno v:
2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.
A 22GS/S 5b ADC implemented in 130nm SiGe BiCMOS technology is presented. The ADC has 0.64V input range and achieves 4.4b and 3.5b ENOB with 34dB and 29dB SFDR at 5GHz and 7GHz input frequencies, respectively. Measured DNL and INL are
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a61f0cc274efacc6b90f72f8a1fad019
https://doi.org/10.1109/isscc.2006.1696297
https://doi.org/10.1109/isscc.2006.1696297
Autor:
Ben-Hamida, N., Sitch, J., Flemke, P., Pollex, D., Schvan, P., Greshishchev, Y., Shing-Chi Wang, Falt, C.
Publikováno v:
16th IEEE International Conference on Electronics, Circuits & Systems, 2009. ICECS 2009; 2009, p695-698, 4p
Autor:
Schvan, P., Bach, J., Fait, C., Flemke, P., Gibbins, R., Greshishchev, Y., Ben-Hamida, N., Pollex, D., Sitch, J., Shing-Chi Wang, Wolczanski, J.
Publikováno v:
2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers; 2008, p544-634, 91p
Publikováno v:
2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers; 2006, p2340-2349, 10p
Autor:
Greshishchev, Y.M., Pollex, D., Shing-Chi Wang, Besson, M., Flemeke, P., Szilagyi, S., Aguirre, J., Falt, C., Ben-Hamida, N., Gibbins, R., Schvan, P.
Publikováno v:
2011 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC); 2011, p194-196, 3p
Autor:
Greshishchev, Y.M., Aguirre, J., Besson, M., Gibbins, R., Falt, C., Flemke, P., Ben-Hamida, N., Pollex, D., Schvan, P., Shing-Chi Wang
Publikováno v:
2010 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC); 2010, p390-391, 2p