A 1.4 V 10-bit 20 MSPS pipelined A/D converter

Autor: Pau-Choo Chung, Ho-Jin Park, Jae-Whui Kim, Hee Cheol Choi, Shin-Kyu Bae

Publikováno v: ISCAS

A 1.4 V 10-bit 20 MSPS pipelined analog-to-digital converter was implemented using 0.25 /spl mu/m CMOS technology. The converter is based on low-voltage two-stage opamps and current reference generator for low-voltage operation. The current reference

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::cb903454ae611018505ea1c14ed79230
https://doi.org/10.1109/iscas.2000.857125

A 1.4 V 10-bit 20 MSPS pipelined A/D converter.

Autor: Hee Cheol Choi, Ho-Jin Park, Shin-Kyu Bae, Jae-Whui Kim, Chung, P.

Publikováno v: Proceedings of the 2000 IEEE International Symposium on Circuits & Systems. Emerging Technologies for the 21st Century (IEEE Cat No.00CH36353); 2000, p439-439, 1p