Zobrazeno 1 - 10
of 89
pro vyhledávání: '"Shigetoshi Nakatake"'
Autor:
Xuechen Zang, Shigetoshi Nakatake
Publikováno v:
Applied Sciences, Vol 11, Iss 13, p 6213 (2021)
Neural networks have been widely used and implemented on various hardware platforms, but high computational costs and low similarity of network structures relative to hardware structures are often obstacles to research. In this paper, we propose a no
Externí odkaz:
https://doaj.org/article/5cd59f96805346d187b46ff5ae621620
Publikováno v:
Sensors, Vol 20, Iss 15, p 4222 (2020)
Perceptron is an essential element in neural network (NN)-based machine learning, however, the effectiveness of various implementations by circuits is rarely demonstrated from chip testing. This paper presents the measured silicon results for the ana
Externí odkaz:
https://doaj.org/article/69d141c74def45998b0e3f0db800da14
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :1720-1730
Autor:
Xuncheng Zou, Shigetoshi Nakatake
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :886-893
Publikováno v:
2021 4th International Conference on Circuits, Systems and Simulation (ICCSS).
An open-source memory compiler has recently drawn the attention of academic researchers involved in Static Random Access Memory (SRAM) designs. Since simulation results for circuits implemented by practical Process Design Kits (PDKs) have rarely been
Publikováno v:
MOCAST
This paper presents an analog circuit comprising a multi-layer perceptron (MLP) applicable to the neural network(NN)-based machine learning. The MLP circuit with rectified linear unit (ReLU) activation consists of 2 input neurons, 3 hidden neurons, a
Autor:
Shigetoshi Nakatake, Xuncheng Zou
Publikováno v:
MWSCAS
A fully synthesizable rail-to-rail dynamic voltage comparator is presented, which can operate at the supply voltage of 0.3V with power consumption as low as 10nW at the clock frequency of 10MHz. By introducing additional transistors as valves to the
Publikováno v:
Integration. 63:240-247
This paper presents a perceptron circuit which can be implemented into a sensor analog front-end consistent with neural network-based machine learning. We introduce a DAC-based multiplier in the perceptron circuit, where the DAC is used as a programm
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems. 23:1-17
Two 1 novel automatic generation methods for analog layout—a symmetrical twin-row method for MOS transistors and a twisted common-centroid method for capacitor arrays—are introduced. Based on the proposed layout styles and the corresponding algor
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :748-754