Zobrazeno 1 - 10
of 28
pro vyhledávání: '"Sheyang Ning"'
Autor:
Sheyang Ning
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 67:2164-2168
In prior researches, low-density-parity-check (LDPC) code is applied on high-speed magnetic random-access-memory (MRAM) for a better correctable bit error rate (CBER). However, on another emerging memory, resistive random-access-memory (RRAM), reset
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d83c34a547ee587804193dacf7c05762
https://doi.org/10.1109/tcsii.2019.2960484
https://doi.org/10.1109/tcsii.2019.2960484
Autor:
Sheyang Ning, Jia Luo
Publikováno v:
IEEE Transactions on Electron Devices. 66:2179-2185
In prior researches, carbon nanotube (CNT)-based nano-random access-memory (NRAM) uses reset initialization which obtains >1011 high write endurance for large-time programmable (LTP) application. In this paper, for the first time, NRAM one-time progr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9739310d0c56cdf22ccc796a9a0b6d15
https://doi.org/10.1109/ted.2019.2907140
https://doi.org/10.1109/ted.2019.2907140
Autor:
Sheyang Ning
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 65:4404-4412
Bose–Chaudhuri–Hocquenghem (BCH) and low-density-parity-check (LDPC) are two popular error correcting codes for non-volatile memories. However, the BCH has limited error correction ability, while the LDPC requires multiple sensing operations per
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cfd9883098fbf9ce3c67b3730a98915f
https://doi.org/10.1109/tcsi.2018.2840350
https://doi.org/10.1109/tcsi.2018.2840350
Publikováno v:
IEEE Journal of Solid-State Circuits. 51:2389-2397
A novel method adaptively controls the comparator bias current in a boost converter for sensor-data storage on Resistive Random Access Memory (ReRAM). ReRAM is ideal for low-power sensors because it is faster and lower voltage than NAND flash. Howeve
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c1e48f0f6e292bb6afbf55779efb6b39
https://doi.org/10.1109/jssc.2016.2584640
https://doi.org/10.1109/jssc.2016.2584640
Autor:
Ken Takeuchi, Shuhei Tanakamaru, Darlene Viviani, Thomas Rueckes, Sheyang Ning, Monte Manning, Henry Huang, Tomoko Ogura Iwasaki
Publikováno v:
IEEE Journal of Solid-State Circuits. 51:1938-1951
A novel error correction scheme, called reset-check-reverse-flag (RCRF), is proposed to improve the reliability of storage class memories (SCMs). RCRF divides the conventional Bose-Chaudhuri-Hocquenghem (BCH) code length into multiple subsections. On
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::adb6529d9d669070af18446d604c84af
https://doi.org/10.1109/jssc.2016.2561966
https://doi.org/10.1109/jssc.2016.2561966
Publikováno v:
IEICE Transactions on Electronics. :444-451
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bc803412ff3d95ccd3896e69bb76aa45
https://doi.org/10.1587/transele.e99.c.444
https://doi.org/10.1587/transele.e99.c.444
Publikováno v:
Solid-State Electronics. 114:1-8
ReRAM’s low voltage and low current programmability are attractive features to solve the scaling issues of conventional floating gate Flash. However, read instability in ReRAM is a critical issue, due to random telegraph noise (RTN), sensitivity to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a3dda8b8969ad468e09e74f024eeea9f
https://doi.org/10.1016/j.sse.2015.06.013
https://doi.org/10.1016/j.sse.2015.06.013
Autor:
Thomas Rueckes, Glen Rosendale, Monte Manning, Eisuke Yanagizawa, Tomoko Ogura Iwasaki, Ken Takeuchi, Sheyang Ning, Kazuya Shimomura, Koh Johguchi, Darlene Viviani
Publikováno v:
IEEE Transactions on Electron Devices. 62:2837-2844
Carbon nanotube (CNT)-based random access memory (NRAM) cells are measured to investigate cell program at different set current compliances and temperatures. Then, a physical model is proposed to explain the mechanism of cell resistance switching. Sp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::66cf12e58d828e7f2ef93a48fe89d80e
https://doi.org/10.1109/ted.2015.2450219
https://doi.org/10.1109/ted.2015.2450219
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 62:844-853
This paper proposes design methodology for highly reliable, high performance ReRAM and 3-bit/cell multi-level cell (MLC) NAND flash solid-state storage. Six techniques, calibrated RRef (CR), flexible RRef (FR), adaptive asymmetric coding (AAC), verif
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a8d98d286d0df57536d0752a95609c6a
https://doi.org/10.1109/tcsi.2014.2370171
https://doi.org/10.1109/tcsi.2014.2370171
Publikováno v:
Solid-State Electronics. 103:64-72
Two verify-reset schemes are proposed to improve the program energy, endurance and speed of 50 nm Al x O y ReRAM cells. Both of the proposed schemes improve the verify-reset program by adapting the program voltage and pulse width to the variation of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8e3338a1e0bb6c098cc466af0660ee40
https://doi.org/10.1016/j.sse.2014.10.003
https://doi.org/10.1016/j.sse.2014.10.003