Zobrazeno 1 - 10
of 19
pro vyhledávání: '"Shengyou Zhong"'
Autor:
Douming Hu, Libin Yao, Nan Chen, Jiqing Zhang, Shengyou Zhong, Wenbiao Mao, Fang Zhu, Juan Zhang
Publikováno v:
Sensors, Vol 24, Iss 11, p 3653 (2024)
This paper presents a 14-bit hybrid column-parallel compact analog-to-digital converter (ADC) for the application of digital infrared focal plane arrays (IRFPAs) with compromised power and speed performance. The proposed hybrid ADC works in two phase
Externí odkaz:
https://doaj.org/article/51e5bf3b108b49fbb94e220604e7277c
Publikováno v:
IEEE Photonics Journal, Vol 10, Iss 6, Pp 1-11 (2018)
A two-dimensional calibration technique is proposed to correct the spatial nonuniformity in infrared imaging systems adapting to different integration time and time-varying offset with one-time calibration. Differing from traditional calibration-base
Externí odkaz:
https://doaj.org/article/e3d6da67c99847b0858e076aac314b8f
Publikováno v:
Conference on Infrared, Millimeter, Terahertz Waves and Applications (IMT2022).
Publikováno v:
Analog Integrated Circuits and Signal Processing. 101:449-461
This paper presents two low-light-level CMOS image sensors with capacitive transimpedance amplifier (CTIA) and digital correlated double sampling (CDS). In order to achieve high sensitivity for low-light-level CMOS image sensor, the CTIA pixel circui
Publikováno v:
Seventh Symposium on Novel Photoelectronic Detection Technology and Applications.
Publikováno v:
Seventh Symposium on Novel Photoelectronic Detection Technology and Applications.
Digital infrared (IR) focal plan array (IRFPA) is one of the most significant characteristic of advanced IR imaging systems, it is implemented by integrating ADCs into the readout integrated circuit (ROIC). Successive Approximation Register (SAR) ADC
Publikováno v:
Seventh Symposium on Novel Photoelectronic Detection Technology and Applications.
Digital readout integrated circuit (ROIC) has become the development tendency of ROIC for infrared focal plane array (IRFPA) due to its advantages such as improved ability of resisting interference, high readout rate and low readout noise. Compared w
Publikováno v:
Seventh Symposium on Novel Photoelectronic Detection Technology and Applications.
Publikováno v:
Sixth Symposium on Novel Optoelectronic Detection Technology and Applications.
This paper presents a two-step ADC architecture for high dynamic range, high sensitivity image sensor. The proposed two-step ADC architecture works in two phases: the coarse quantization phase in each pixel, digital integration technique is applied t
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 65:84-94
This paper presents a low noise CMOS image sensor using conventional 3T active pixel with Nwell/Psub diode as photo detector. Both fixed pattern noise (FPN) and temporal noise are suppressed by the proposed digital correlated multiple sampling (DCMS)