Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Sheldon Weng"'
Autor:
Nachiket Desai, Han Wui Then, Jingshu Yu, Harish K. Krishnamurthy, William J. Lambert, Nicolas Butzen, Sheldon Weng, Christopher Schaef, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
Publikováno v:
IEEE Journal of Solid-State Circuits. 57:1090-1099
Autor:
Suhwan Kim, Harish K. Krlshnarnurthy, Sergey Sofer, Sheldon Weng, Shahar Wolf, Ashoke Ravi, Krishnan Ravichandran, Ofir Degani, James W. Tschanz, Vivek De
Publikováno v:
2023 IEEE International Solid- State Circuits Conference (ISSCC).
Autor:
Nicolas Butzen, Harish Krishnarnurthy, Zakir Ahmed, Sheldon Weng, Krishnan Ravichandran, Michael Zelikson, James Tschanz, Jonathan Douglas
Publikováno v:
2023 IEEE International Solid- State Circuits Conference (ISSCC).
Autor:
Nachiket Desai, Harish K. Krishnamurthy, Suhwan Kim, Christopher Schaef, Sheldon Weng, Beomseok Choi, William J. Lambert, Krishnan Ravichandran, James W. Tschanz, Vivek De
Publikováno v:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
Autor:
Jin Feng, Kim Suhwan, Huong Do, Sheldon Weng, Vivek De, Harish K. Krishnamurthy, Kaladhar Radhakrishnan, James W. Tschanz, Krishnan Ravichandran, Sally Safwat Amin
Publikováno v:
IEEE Solid-State Circuits Letters. 4:234-237
Autor:
William J. Lambert, Huong Do, Harish K. Krishnamurthy, Sheldon Weng, Nachiket Desai, Vivek De, Christopher Schaef, Kim Suhwan, Khondker Zakir Ahmed, Krishnan Ravichandran, Kaladhar Radhakrishnan, James W. Tschanz, Xiaosen Liu
Publikováno v:
IEEE Journal of Solid-State Circuits. 54:3316-3325
Fully integrated voltage regulators (FIVRs) offer many advantages, such as fine-grained power management, fast transient response, and reduced form factor. This article addresses light-load efficiency in FIVRs with nH-scale air-core inductors. The ch
Autor:
Sheldon Weng, Han Wui Then, Nidhi Nidhi, Christopher Schaef, Nicolas Butzen, Jingshu Yu, Marko Radosavljevic, Kaladhar Radhakrishnan, J. Sandford, William J. Lambert, Krishnan Ravichandran, Vivek De, Rode Johann Christian, Nachiket Desai, Sell Bernhard, Harish K. Krishnamurthy, James W. Tschanz
Publikováno v:
VLSI Circuits
A 5V-input, high-frequency, high-density (9A/mm2) buck converter featuring a low-voltage GaN power transistor (with 5-10× better FoM than Si) with on-die gate clamps, integrated with a CMOS companion die in 4mm × 4mm package, achieves 94.2% peak ef
Autor:
Nachiket Desai, Zakir K. Ahmed, Sheldon Weng, Harish K. Krishnamurthy, Xiaosen Liu, Krishnan Ravichandran, Vivek De, James W. Tschanz
Publikováno v:
VLSI Circuits
A dual-input, digital hybrid buck-LDO system featuring 300MHz Fully-Integrated Voltage Regulator (FIVR) and Computational Transient Management Controller (CTMC) based Low Dropout (LDO) regulator is presented. The high speed, parallel CTMC-LDO reduces
Autor:
Jin Feng, Harish K. Krishnamurthy, Kaladhar Radhakrishnan, Huong Do, James W. Tschanz, Sally Safwat Amin, Krishnan Ravichandran, Kim Suhwan, Sheldon Weng, Vivek De
Publikováno v:
VLSI Circuits
A 1S direct-battery-attach buck converter with a 5-stack, thin-gate-FinFET power train delivers a peak efficiency of 89.2% for a 3.8V in to 1.8V out, with 10x higher power density (~15A/mm2), switching at up to 10x higher frequency (40MHz) using 4x-1
Autor:
Kaladhar Radhakrishnan, Nachiket Desai, Khondker Zakir Ahmed, James W. Tschanz, Sheldon Weng, Huong Do, Harish K. Krishnamurthy, Vivek De, Xiaosen Liu, Krishnan Ravichandran, Kim Suhwan
Publikováno v:
ISSCC
High-performance many-core processors and GPUs demand 100s of Watts of power in a single voltage/power domain on chip, operating below 1V. High-frequency and highcurrent-density fully integrated voltage regulators (FIVRs) with in-package air core ind