Zobrazeno 1 - 10
of 52
pro vyhledávání: '"Shawn G. Thomas"'
Autor:
Jeffrey L. Libbert, Jensen Leif, Mike Seacrist, Theis Leth Sveigaard, Shawn G. Thomas, Carissma Hudson
Publikováno v:
2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).
Results are given of an evaluation of Nitrogen doped Float Zone (FZ) silicon wafers as an ultra-high resistivity base wafer for creating a Charge Trap Layer SOI (CTL-SOI) wafer. The FZmaterial was found to perform equivalently to Czochralski (CZ) waf
Autor:
Matthias Bauer, Shawn G. Thomas
Publikováno v:
Thin Solid Films. 520:3139-3143
We present a catalyst enhanced etch process with high etch rates for amorphous Si based alloys (e.g. α-Si, α-Si:C, α-Si:P, α-SiCP) and low etch rates for crystalline Si (e.g. c-Si, c-Si:C, c-Si:P, c-SiCP) with etch rate ratios up to ~ 200. The ad
Autor:
Matthias Bauer, Shawn G. Thomas
Publikováno v:
Thin Solid Films. 520:3144-3148
We demonstrate growth of SiCP film on Si(110) substrates with excellent structural quality, based on X-Ray Diffraction, Cross-sectional Transmission Electron Microscopy and Secondary Ion Mass Spectrometry analysis. This (110) surface orientation is v
Publikováno v:
Thin Solid Films. 520:3158-3162
In this work, we demonstrate substitutional phosphorus concentration as high as 12 at.% in epitaxial silicon. It is observed that 10 at.% substitutional phosphorus doping is equivalent in tensile strain to incorporating 2.1 at.% substitutional carbon
Autor:
Matthias Bauer, Shawn G. Thomas
Publikováno v:
Thin Solid Films. 520:3133-3138
In this paper we demonstrate a Si 3 H 8 /SiH 3 CH 3 /PH 3 /Cl 2 based co-flow process and a “hybrid” co-flow process with interruptions of the deposition. The motivation for the work stems from the desire to improve manufacturability through high
Autor:
Christophe Detavernier, Vladimir Machkaoutsan, Christian Lavoie, J. Jordan Sweet, Matthias Bauer, B. De Schutter, K. De Keyser, Shawn G. Thomas
Publikováno v:
Microelectronic Engineering. 88:536-540
We investigated the phase formation and texture of nickel silicides formed during the reaction of 10nm sputter deposited nickel with Si"1"-"xC"x epitaxial layers on Si(100) substrates, having a carbon content between 0 and 2.5 atomic percent. It was
Publikováno v:
ECS Transactions. 33:849-857
The semiconductor industry is being pushed to develop smaller and faster devices as well as increase functionality. As such, a key part of the long-term technology roadmap will include integrating disparate semiconductor materials to provide superior
Autor:
Matthias Bauer, Shawn G. Thomas
Publikováno v:
ECS Transactions. 33:629-636
In-situ doped Si:P alloys with high P concentration received much interest over the last few years as a method to reduce external transistor resistance (and contact resistance) [1-6]. An optimized Si3H8/PH3/Cl2 based Si:P SEG process with a SEG rate
Autor:
Paul M. Solomon, Wilfried Haensch, Steve Laux, Shawn G. Thomas, Jim Cai, Leland Chang, Jeffrey W. Sleight, Pierre Tomasini, S.J. Koester, Siyu Koswatta, Isaac Lauer, Stephen W. Bedell, Amlan Majumdar
Publikováno v:
ECS Transactions. 33:357-361
Introduction. The ability to scale CMOS to future technology nodes is jeopardized primarily by power constraints. Supply voltage scaling is the best method to reduce power consumption in logic circuits; however, the thermionic nature of the turn-off
Autor:
Shawn G. Thomas, Ernst Hendrik August Granneman, Peter Verheyen, C.S. Kim, Roger Loo, Y. Zhang, Matthias Bauer, W. Vandervorst, Naoto Horiguchi, Sebastian Koelling, Philippe Absil, Vladimir Machkaoutsan, Anne Lauwers, T. Y. Hoffmann, K. Vanormelingen, Alexis Franquet, Christoph Kerner
Publikováno v:
Microelectronic Engineering. 87:306-310
In this paper we report on electrical demonstration of thermally stable Ni silicides. It has been shown that when a sacrificial Si"1"-"xC"x epilayer is grown in the source-drain areas of NMOS transistors prior to silicidation, Ni silicides can withst