Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Shashikanth Bobba"'
Autor:
Giovanni De Micheli, Shashikanth Bobba
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23:2103-2115
As we advance into the era of nanotechnology, semiconductor devices are scaled down to their physical limits, thereby opening up venues for new transistor channel materials based on nanowires and nanotubes. Transistors based on nanowires and nanotube
Autor:
Michele De Marchi, Luca Amaru, Pierre-Emmanuel Gaillardon, Davide Sacchetto, Shashikanth Bobba, Giovanni De Micheli
Publikováno v:
Philosophical transactions. Series A, Mathematical, physical, and engineering sciences
Nanosystems are large-scale integrated systems exploiting nanoelectronic devices. In this study, we consider double independent gate, vertically stacked nanowire field effect transistors (FETs) with gate-all-around structures and typical diameter of
Autor:
Michele De Marchi, Yusuf Leblebici, Luca Amaru, Giovanni De Micheli, Shashikanth Bobba, Pierre-Emmanuel Gaillardon, Davide Sacchetto
Publikováno v:
DAC
In addition to scaling semiconductor devices down to their physical limit, novel devices show enhanced functionality compared to conventional CMOS. At advanced technology nodes, many devices exhibit ambipolar behavior, i.e., they show n- and p-type c
Autor:
Pierre-Emmanuel Gaillardon, Vasilis F. Pavlidis, Giovanni De Micheli, Ciprian Seiculescu, Shashikanth Bobba
Publikováno v:
ISCAS
Two diverse manufacturing techniques for building 3-D integrated systems are vertical integration with Through-Silicon-Vias (TSVs), also referred to as 3-D TSV integration, and 3-D monolithic integration. In this paper, we present a hybrid integratio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e13cbd0776cff8615f7676f9bae337e8
Autor:
Pierre-Emmanuel Gaillardon, Luca Gaetano Amaru, Shashikanth Bobba, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
Publikováno v:
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013.
Autor:
Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Shashikanth Bobba, Yusuf Leblebici, Davide Sacchetto
Publikováno v:
VLSI-SoC
The invention of the memristor enables new possibilities for computation and non-volatile memory storage. In this paper we propose a Generic Memristive Structure (GMS) for 3-D FPGA applications. The GMS cell is demonstrated to be utilized for steerin
Publikováno v:
DAC
We have designed and fabricated double-gate ambipolar field-effect transistors, which exhibit p-type and n-type characteristics by controlling the polarity of the second gate. In this work, we present an approach for designing an efficient regular la
Autor:
Perrine Batude, C. Le Royer, Laurent Clavelier, Simon Deleonibus, O. Faynot, Francois Andrieu, Loic Sanchez, Olivier P. Thomas, H. Ben Jamaa, G. De Micheli, Perceval Coudrain, L. Baud, Benoit Sklenard, A. Pouydebasque, Shashikanth Bobba, J. Mazurier, Olivier Weber, P.-E. Gaillardon, V. Carron, Bernard Previtali, Maud Vinet, L. Tosti, Claude Tabone, Thierry Poiroux, J.M. Hartmann, L. Brevard, Cuiqin Xu
Publikováno v:
2011 International Electron Devices Meeting.
3D sequential integration enables the full use of the third dimension thanks to its high alignment performance. In this paper, we address the major challenges of 3D sequential integration: in particular, the control of molecular bonding allows us to
Autor:
Shashikanth Bobba, Ashutosh Chakraborty, Olivier Thomas, Perrine Batude, Thomas Ernst, Olivier Faynot, David Pan, Giovanni De Micheli
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=acm_________::d76e547faafb7e6e93deb449af469d3e
http://dl.acm.org/citation.cfm?id=1950889
http://dl.acm.org/citation.cfm?id=1950889
Autor:
Shashikanth Bobba, Ashutosh Chakraborty, Olivier Thomas, Perrine Batude, Thomas Ernst, Olivier Faynot, David Z. Pan, Giovanni De Micheli
Publikováno v:
16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequential order, the size of the vertical contacts is similar to traditional