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Publikováno v:
2015 International Conference on Computing Communication Control and Automation.
Runtime Partial Reconfiguration (PR) of FPGA is an attractive feature which offers countless benefits across multiple industries. Xilinx has supported PR for many generation of devices. PR dynamically modified hardware portion of the device function
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d685261d10f21fba89ad47f04ebd0ed0
https://doi.org/10.1109/iccubea.2015.189
https://doi.org/10.1109/iccubea.2015.189
