Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Shanti Pancharatnam"'
Autor:
Phillip J. Restle, John G. Massey, Paul C. Jamison, Sebastian Naczas, Eric Liu, Alex Romero, Vijay Narayanan, Shanti Pancharatnam, Hemanth Jagannathan, Kisik Choi, Joshua M. Rubin, Nicolas Loubet, P.J. Chen, Eduard A. Cartier, Takashi Ando
Publikováno v:
ECS Transactions. 97:81-92
We demonstrate a MIM capacitor structure using ZrO2 for the dielectric layer which exhibits a 25% capacitance increase (from ~43fF/mm2 to >55fF/mm2 for a ~55A film) with minimal leakage current increase compared to Hf based dielectrics, extending the
Autor:
Daniel Schmidt, Aron Cepler, Curtis Durfee, Shanti Pancharatnam, Julien Frougier, Mary Breton, Andrew Greene, Mark Klare, Roy Koret, Igor Turovets
Methodologies for characterization of the lateral indentation of silicon-germanium (SiGe) nanosheets using different non-destructive and in-line compatible metrology techniques are presented and discussed. Gate-all-around nanosheet device structures
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a0b883d3edd86a617680648728b9db75
Autor:
Adra Carr, Shanti Pancharatnam, Gabriel Rodriguez, L. White, Brock Mendoza, W. Wang, Scott DeVries, R. N. Pujari, Gauri Karve, Mary Breton, Jean E. Wynne
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 32:374-380
The changes in tungsten (W) film growth and resistance are studied using different titanium nitride (TiN) and tantalum nitride (TaN) underlayer films. The underlayers are analyzed by surface characterization techniques to obtain the differences in su
Autor:
Roy Koret, Gilad Belkin, Manasa Medikonda, Shay Wolfling, Curtis Durfee, Frougier Julien, Andrew M. Greene, Roy Shtainman, Daniel Schmidt, Igor Turovets, Dror Shafir, Aron Cepler, Shanti Pancharatnam
Publikováno v:
Metrology, Inspection, and Process Control for Semiconductor Manufacturing XXXV.
In this work, the novel enhancement to multichannel scatterometry data collection, Spectral Interferometry, is introduced and discussed. The Spectral Interferometry technology adds unique spectroscopic data by providing absolute phase information. Th
Autor:
Ruilong Xie, Heng Wu, Muthumanickam Sankarapandian, Dechao Guo, Huiming Bu, Balasubramanian S. Haran, Jingyun Zhang, Prasad Bhosale, Su-Chen Fan, Shogo Mochizuki, Zuoguang Liu, Andrew M. Greene, Jean E. Wynne, Frougier Julien, Nicolas Loubet, Veeraraghavan S. Basker, Shanti Pancharatnam
Publikováno v:
2020 IEEE International Interconnect Technology Conference (IITC).
An analysis of NanoSheet (NS) transistor parasitic resistance components is presented and correlated to the resistance readout on Si wafers. With this model, it is possible to identify which components cause the parasitic resistance increases as CPP
Autor:
Jing Guo, Balasubramanian S. Pranatharthi Haran, Miaomiao Wang, Paul C. Jamison, V. Basker, James Chingwei Li, Richard G. Southwick, Vijay Narayanan, Shanti Pancharatnam, Dechao Guo, Muthumanickam Sankarapandian, Nicolas Loubet, Ruqiang Bao, Huimei Zhou, Huiming Bu, Koji Watanabe, Mukesh Khare, Jingyun Zhang, James J. Demarest
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
We report that n-dipole and p-dipole (dual dipoles) can be co-integrated to provide a more flexible volumeless multiple threshold voltage(multi-Vt) solution in FinFET and Nanosheet (NS) technologies. The p-dipole process for dual dipoles co-integrati
Autor:
Hosadurga Shobha, Tenko Yamashita, Chanro Park, Huiming Bu, R. Divakaruni, V. Basker, C. Adams, Dechao Guo, Jingyun Zhang, Lan Yu, Pietro Montanini, X.-H. Liu, A. Arceo De La Pena, Frougier Julien, Kai Zhao, Ruqiang Bao, Robert R. Robison, Nicolas Loubet, Balasubramanian S. Pranatharthi Haran, Muthumanickam Sankarapandian, Xin Miao, James Chingwei Li, Richard A. Conti, Tian Shen, Junli Wang, Praveen Joseph, Huimei Zhou, Koji Watanabe, Reinaldo A. Vega, Shanti Pancharatnam, Ruilong Xie, Curtis Durfee, A. Gaul, Daniel J. Dechene, Andrew M. Greene, Robin Chao, Dexin Kong, Heng Wu
Publikováno v:
2019 IEEE International Electron Devices Meeting (IEDM).
In this paper, full bottom dielectric isolation (BDI) is first demonstrated on horizontally stacked Nanosheet device structures with Lmetal 12 nm. The comparison of full BDI scheme vs punch through stopper (PTS) scheme has been systematically studied
Autor:
Miaomiao Wang, Huimei Zhou, Alex Hubbard, Paul C. Jamison, Balasubramanian S. Pranatharthi Haran, Huiming Bu, Ruqiang Bao, Jing Guo, V. Basker, A. Gaul, Mukesh Khare, Nicolas Loubet, Koji Watanabe, James Chingwei Li, Daniel J. Dechene, Dechao Guo, Reinaldo A. Vega, Muthumanickam Sankarapandian, Shanti Pancharatnam, Jingyun Zhang
Publikováno v:
2019 IEEE International Electron Devices Meeting (IEDM).
In Nanosheet (NS) device architecture, it is much more challenging than FinFET to develop a suitable multiple threshold voltage (multi-Vt) integration with more restrictive requirement on the dimensions due to the critical dimension scaling and compl
Autor:
R. Divakaruni, C. Alix, Trace Hurd, M. Sankar, Aelan Mosden, Mary Breton, Thamarai S. Devarajan, Huimei Zhou, Chanemougame Daniel, Shanti Pancharatnam, Peter Biolsi, Subhadeep Kal, Andrew M. Greene, V. Basker, Kandabara Tapily, Jeffrey Smith, Balasubramanian S. Pranatharthi Haran, Jingyun Zhang, N. Haller, Michael P. Belyansky, Curtis Durfee, Robin Chao, Huiming Bu, Koji Watanabe, Xin Miao, Lan Yu, Frougier Julien, Nicolas Loubet
Publikováno v:
2019 IEEE International Electron Devices Meeting (IEDM).
In this paper, we demonstrate a first of a kind SiGe dry etch technique for the formation of inner spacers and for channel release, enabling stacked NanoSheet (NS) gate-all-around device architectures. This novel etch involves a precisely controlled
Autor:
Andrew M. Greene, Aelan Mosden, Peter Biolsi, Cheryl Alix, Jeffrey Smith, Veeraraghavan S. Basker, Subhadeep Kal, Daniel Schmidt, Michael P. Belyansky, Koji Watanabe, Frougier Julien, Shanti Pancharatnam, Nicolas Loubet, Jingyun Zhang, Flaugh Matthew, Dechao Guo, Kai Zhao, Huimei Zhou, Maruf Bhuiyan, Balasubramanian S. Haran, Chanemougame Daniel, Miaomiao Wang, Curtis Durfee, Huiming Bu, Ivo Otto, Mary Breton
Publikováno v:
ECS Meeting Abstracts. :943-943
Horizontally stacked nanosheet gate-all-around devices enable area scaling of transistor technology, while providing improved electrostatic control over FinFETs for a wide range of channel widths within a single chip for simultaneous low power applic