Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Shankar Thirunakkarasu"'
Autor:
Fabian Silva-Rivas, Xuefeng Yu, Shankar Thirunakkarasu, Frank Singor, Jie Fang, Jacob A. Abraham, Chaoming Zhang
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 64:1673-1683
This paper presents a 5-GS/s 12-way 10-b time-interleaved successive approximation register (SAR) ADC for direct sampling receivers. Proper signal and clock distribution along the multiple channels are utilized to mitigate interchannel bandwidth and
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23:916-925
Several state-of-the-art monitoring and control systems, such as dc motor controllers, power line monitoring and protection systems, instrumentation systems, and battery monitors, require direct digitization of high-voltage (HV) input signals. Analog
Autor:
Shankar Thirunakkarasu, Frank Singor, Fabian Silva-Rivas, Xuefeng Yu, Chaoming Zhang, Jie Fang, Kwang Young Kim
Publikováno v:
CICC
This paper presents a 5GS/s 12-way 10b time-interleaved SAR ADC. Each SAR sub-ADC resolves 11b using reduced radix-2 with 1b redundancy, which tolerates decision errors arising from noise, reference settling error, etc. The top-plate sampling with me
Autor:
Sivakumar Ganesan, Xuefeng Yu, Jose Fabian Silva-Rivas, Shankar Thirunakkarasu, Kannan Deenadayalan, Frank Singor, Jie Fang, Nand Jha, Chaoming Zhang, Bharath Kumar Thandri, Ardie Venes
Publikováno v:
MWSCAS
A highly linear, 3rd order, active-RC low-pass elliptic filter with Variable Gain Amplifier (VGA) is presented. The new derivative-free biquad topology for an elliptic filter could be easily extended to a higher order filter using a cascade of biquad
Publikováno v:
MWSCAS
Publikováno v:
ISCAS
A radix-3, 4-trits, Ternary Successive Approximation Analog to Digital Converter (TSAR-ADC), with an option to extend to radix-N approaches is presented. Proposed TSAR-ADC architecture generates 4 ternary outputs spanning 34=81 binary levels linearly
Autor:
B. Sivakumar, Shankar Thirunakkarasu
Publikováno v:
2008 International Conference on Advanced Computer Theory and Engineering.
As process technologies slow down in their miniaturization, system design relies more heavily on innovation rather than technology to push the limits of speed beyond that of the existing systems. Parasitic capacitances dominate the paths in which the
Publikováno v:
2008 51st Midwest Symposium on Circuits and Systems.
This paper describes a modified second-order sigma-delta (SigmaDelta) modulator using hybrid integrators that is designed for WLAN applications. Hybrid integrators are composed of analog and digital integrators where the overflow of an analog integra